HD74CBT3257.pdf

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HD74CBT3257
4-bit 1-of-2 FET Multiplexer / Demultiplexer
ADE-205-624B (Z)
Rev. 2
Nov. 2001
Description
The HD74CBT3257 is a 4-bit 1-of-2 high-speed TTL-compatible FET multiplexer / demultiplexer. The
low on-state resistance of the switch allows connections to be made with minimal propagation delay.
Output enable (OE) and select control (S) inputs select the appropriate B1 and B2 outputs for the A-input
data.
Features
•
Minimal propagation delay through the switch.
•
5
Ω
switch connection between two ports.
•
TTL-compatible input levels.
•
Ultra low quiescent power.
-Ideally suited for notebook applications.
•
Package type
Product code example: HD74CBT3257TELL
Package type Package code Package suffix Taping code
TSSOP-16pin TTP-16DA T ELL(2000pcs / Reel)
Notes: 1. As for the Pb-free package is attached the “V” to the end of package code.
2. As for the Pb-free product is attached the “–E” to the end of product code.
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HD74CBT3257
Function Table
Inputs
OE
S
Function
L
L
A port = B1 port
L
H
A port = B2 port
H
X
Disconnect
H:
High level
L:
Low level
X:
Immaterial
Pin Arrangement
S
1
16
V CC
1B1
2
15
OE
1B2
3
14
4B1
1A
4
13
4B2
2B1
5
12
4A
2B2
6
11
3B1
2A
7
10
3B2
GND
8
9
3A
(Top view)
Rev.2, Nov. 2001, page 2 of 11
OOE
OE
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HD74CBT3257
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Conditions
Supply voltage range
V CC
− 0.5 to 7.0
V
Input voltage range *1
V I
− 0.5 to 7.0
V
Input clamp current
I IK
− 50
mA
V I < 0
Continuous output current
I O
128
mA
V O = 0 to V CC
Continuous current through
V CC or GND
I CC or I GND
± 100
mA
Maximum power dissipation
at Ta = 25°C (in still air) *2
P T
500
mW
TSSOP
Storage temperature
Tstg
− 65 to 150
°C
Notes:
The absolute maximum ratings are values which must not individually be exceeded, and
furthermore, no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded even if the input and output clamp-current
ratings are observed.
2. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Recommended Operating Conditions
Item
Symbol
Min
Max
Unit
Conditions
Supply voltage range
V CC
4.0
5.5
V
Input voltage range
V I
0
5.5
V
Output voltage range
V I/O
0
5.5
V
Input transition rise or fall rate
∆ t / ∆ v
0
5
ns / V
V CC = 4.5 to 5.5 V
Operating free-air temperature
Ta
− 40
85
°C
Note: Unused or floating inputs must be held high or low.
Rev.2, Nov. 2001, page 3 of 11
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HD74CBT3257
Block Diagram
1A
4
2
1B1
3
1B2
2A
7
5
2B1
6
2B2
3A
9
11
3B1
10
3B2
4A
12
14
4B1
13
4B2
S
1
OE
15
Rev.2, Nov. 2001, page 4 of 11
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HD74CBT3257
DC Electrical Characteristics
(Ta =
−
40 to 85°C)
Item
Symbol
V CC (V)
Min
Typ *1
Max
Unit
Test conditions
Clamp diode voltage V IK
4.5
− 1.2
V
I IN = − 18 mA
Input voltage
V IH
4.0 to 5.5 2.0
V
V IL
4.0 to 5.5 0.8
On-state switch
resistance *2
R ON
4.0
14
20
Ω
V IN = 2.4 V,
I IN = 15 mA
Typ at V CC = 4.0 V
4.5
5
7
V IN = 0 V,
I IN = 64 mA
4.5
5
7
V IN = 0 V,
I IN = 30 mA
4.5
10
15
V IN = 2.4 V,
I IN = 15 mA
Input current
I IN
0 to 5.5 ± 1.0
µ A
V IN = 5.5 V or GND
Off-state leakage
current
I OZ
5.5
± 1.0
µ A
0 ≤ A, B ≤ V CC
Quiescent supply
current
I CC
5.5
3
µ A
V IN = V CC or GND,
I O = 0 mA
Increase in I CC
per input *3
∆ I CC
5.5
2.5
mA
One input at 3.4 V,
other inputs at V CC or
GND
Notes:
For condition shown as Min or Max use the appropriate values under recommended operating
conditions.
1. All typical values are at V CC = 5 V (unless otherwise noted), Ta = 25°C.
2. Measured by the voltage drop between the A and B terminals at the indicated current through the
switch. On-state resistance is determined by the lower voltage of the two (A or B) terminals.
3. This is the increase in supply current for each input that is at the specified TTL voltage level
rather than V CC or GND.
Capacitance
(Ta = 25°C)
Item
Symbol V CC (V)
Min
Typ
Max
Unit
Test conditions
Control input
capacitance
C IN
5.0
3.5
pF
V IN = 0 or 3 V
Input / output
A port C I/O (OFF)
5.0
9
pF
V O = 0 or 3 V
OE = V CC
Note: This parameter is determined by device characterization is not production tested.
B port
5.0
5
Rev.2, Nov. 2001, page 5 of 11
capacitance
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