09Audio dac.pdf

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SCHEMATIC1 : 09:Audio dac
5
4
3
2
1
+5AVAA
DVCC3
DVCC3
U11
BC82
0.1U
GND
5
6
11
12
13
DVDD
DGND
ML/I2S
MC/IWL
MD/DM
AVDD
VREFP
AGND
VREFN
28
17
27
16
AU_ML
AU_MC
AGND
BC48
0.1U
D
D
AU_MD
AGND
1
14
2
3
4
7
8
9
MODE
MUTE
MCLK
BCLK
LRC
DIN1
DIN2
DIN3
OUT1L
OUT2L
OUT2R
OUT3L
OUT3R
21
23
24
25
26
C_C
C_C
8
GND
OUT1R
22
SW
SW
8
SL
SL
8
AU_XCK
SR
AU_BCK
SR
8
AGND
AU_LRCK
F_L
8
AU_D3
F_R
8
AU_D2
AU_D1
VMID
TESTREF1
18
15
A_CAP
If ML,MC are pulled
high,R118 and R120
are 1M.
WM8766
BC53
0.1U
+ EC29
10U16V
BC54
0.1U
AU_D0
AU_D0
2
AGND
R1 20
N C(1 M)
R1 18
N C(1M )
+5AVAA
+5AVAA
AU_ML
AU_MC
AGND
AU_D3
AU_D3
2
C
R1 19
0
R1 17
0
AU_D2
AU_D1
AU_LRCK
AU_BCK
AU_XCK
C
GND
GND
AU_D2
2
AU_D1
2
AU_LRCK
2
AU_BCK
2
Audio Format:
AU_XCK
2
AU_MD
GND
ML,MC=00=> RJ 24 bit
ML,MC=01=> RJ 20 bit
ML,MC=10=> I2S 16 bit
ML,MC=11=> I2S 24 bit
B
B
U10
NC(W8726/W8761)
AU_LRCK
1
LRCIN
MCLK
FORMAT
DEEMPH
14
13
12
AU_XCK
AU_D0
2
3
AU_ML
AU_BCK
DIN
BCKIN
GND
4
11
NC
NC
A_CAP
5
10
CAP
MUTE
AGND
F_R
F_L
6
9
VoutR
VoutL
7
8
AGND
AGND
VCC
+5AVAA
WM8726 Format Setting(AU_ML)
0:16 bits, Right justified
1:24 bits, I2S
A
A
WM8761 Format Setting(AU_ML)
0:24 bits, Right justified
Title
1:24 bits, I2S
Audio DAC
Size
Document Number
Rev
B
8200-32-FS- 0-B
1.0
Date:
Friday, December 19, 2003
S heet
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