EMC_Part6_ESD_Flicker_PFC.pdf

Design Techniques for EMC – Part 6

ESD, Dips, Flicker, Dropouts, Electromechanical Switching, and Power

Factor Correction

By Eur Ing Keith Armstrong CEng MIEE MIEEE

Partner, Cherry Clough Consultants, Associate of EMC-UK

This is the final part of a series of six articles on best-practice EMC techniques in

electrical/electronic/mechanical hardware design. The series is intended for the designer of

electronic products, from building block units such as power supplies, single-board computers, and

“industrial components” such as motor drives, through to stand-alone or networked products such

as computers, audio/video/TV, instruments, etc.

The techniques covered in the six articles are:

1) Circuit design (digital, analogue, switch-mode, communications), and choosing components

2) Cables and connectors

3) Filters and transient suppressers

4) Shielding

5) PCB layout (including transmission lines)

6) ESD, dips, flicker, dropouts, electromechanical switching, and power factor correction

A textbook could be written about any one of the above topics (and many have), so this magazine

article format can only introduce the various issues and point to the most important best-practice

techniques. Many of the techniques described in this series are also important for improving signal

integrity: reducing the number of iterations during development and reducing manufacturing costs.

Table of contents for this part

6. A number of specific issues

6.1 Electrostatic Discharge (ESD)

6.1.1 Different types of ESD

6.1.2 The "Human Body Model" and ESD testing

6.1.3 Design techniques for personnel ESD

6.1.4 Dielectric protection

6.1.5 Shielding

6.1.6 Adding impedance to signal lines

6.1.7 Transient Voltage Suppressors (TVSs)

6.1.8 Low-pass filtering the signal lines

6.1.9 Common-mode filtering at connectors

6.1.10 Galvanic isolation techniques for ESD

6.1.11 Dealing with signal corruption

6.2 Dips, sags, brownouts, swells, dropouts, interruptions and power outages

6.3 Emissions of voltage fluctuations and flicker

6.4 The influence of the supply inductance

6.4.1 Reducing emissions from fluctuating DC loads

6.5 Electromechanical switching

6.5.1

Suppressing arcs and sparks at switches, relays, and contactors

6.5.2

Suppressing arcs and sparks in DC motors

6.5.3

Suppressing arcs and sparks in electric bells

6.6

Power factor correction

System level techniques

Design techniques for EMC– Part 6: ESD etc.  Cherry Clough Consultants Jan 2000 Page 1 of 47

Conclusion to the Series

6. A number of specific issues

The previous parts of this series focussed on design techniques which will benefit a large number of

emissions and immunity characteristics whilst also improving signal integrity. This article finishes off

the series with a number of issues where specific techniques may be required, and signal integrity

may not be a concern.

6.1

Electrostatic Discharge (ESD)

6.1.1

Different types of ESD

The high voltages that cause ESD arise through tribo-charging, the natural process by which

electrons get transferred from one material to another of a different type when they are rubbed

together. Man-made fabrics and plastic materials are often very good at tribo-charging, so ESD

problems tend to be on the increase. ESD is a very fast phenomenon, and very intense while it lasts

(usually just a few tens of nanoseconds overall).

Machinery ESD occurs when isolated metal parts rub against insulating materials, or have a flow of

insulating liquids or gases over them. The metal parts tribo-charge until they discharge with a spark

into something nearby which was not previously charged, equalising their potentials. Sparks created

in this way by machinery can be very intense, especially when the metal part being charged is large

and so has a large capacitance, which can store a large amount of charge.

Furniture ESD occurs when metal furniture (or parts of furniture) such as chairs, tables, cabinets,

etc., become tribo-charged by friction against insulating materials. This may happen when the

furniture is moved across a carpet or plastic floor covering, or because materials are rubbed against

it, for instance when a person gets up from a chair.

Personnel ESD is caused by people becoming tribo-charged, usually by walking around. Walking on

plastic floor coverings, synthetic carpets, etc., is the usual cause of personnel ESD. Few people can

even notice sparks from their fingers which are under 2.5kV.

Spacecraft ESD is not covered here, although many of the techniques described will be applicable.

All these three types of ESD are very important in the manufacture of semiconductors and the

assembly of electronic products, and in these areas great lengths are taken to prevent the three

types of ESD from reducing yields. Machine ESD can be a big problem for process control

automation. But personnel ESD is the only type of ESD which we find in EMC standards

harmonised under the EMC Directive. ESD causes EMC problems in three main ways:

• The spark voltages which get into semiconductors can easily damage them. Modern

semiconductors use internal insulation which can breakdown and permanently short out areas of

the device at just a few tens of volts. This is known as a hard failure.

• Most ICs are made with built-in protective devices to help prevent them from damage by ESD

during handling and assembly. However, these internal devices can’t be made large enough to

handle large amounts of power, and a significant ESD event can over-dissipate them,

sometimes while leaving the semiconductor still functional. This is known as a soft failure,

because the semiconductor usually fails a few weeks or months later.

• The intense transient electric and magnetic fields created in the vicinity of an ESD spark can

induce voltages or currents into nearby circuitry and upset its operation. This does not usually

cause direct damage, although the resulting malfunction can sometimes cause consequential

damage of some sort.

Design techniques for EMC– Part 6: ESD etc.  Cherry Clough Consultants Jan 2000 Page 2 of 47

6.1.2

The "Human Body Model" and ESD testing

The ESD simulator used for testing to EN 61000-4-2 is based upon the 150pF/330 Ω human body

model, and generates a waveform with a risetime of between 700ps and 1ns to reach a peak of

several kV, which then decays to about 50% in 50ns. At a voltage of 8kV the peak current into a

50 Ω calibration load is close to 20A. The frequency content of such an ESD waveform is flat to

around 300MHz before it begins to roll off, so contains significant energy at 1GHz and above.

Some older test standards use an older human body model which only has a 5ns risetime, so its

spectrum begins to roll off at 60MHz and it is not as aggressive a test as EN 61000-4-2. As high-

speed measurement techniques improve, it appears that real ESD events may have risetimes faster

than 700ps.

Testing to EN61000-4-2 (personnel discharge) involves the following:

• Air discharges of up to ±8kV (using an 8mm round tip to simulate a human finger) are applied to

everything non-metallic which is normally accessible to the operator.

• Contact discharges of up to ±4kV (using a sharp tip which is touched against the product before

the discharge) are applied to operator-accessible metal parts – and also to nearby vertical and

horizontal metal planes.

Test voltages are increased gradually from low values, often using the settings 25%, 50%, 75%, and

then 100% of the test voltage. This is because ESD failures are sometimes seen to occur at lower

voltages but not at the maximum test level. The highest test level on an ESD test is not necessarily

the one most likely to cause a failure (this is also true for other types of transients). Figure 6A is a

sketch of the barest essentials of an ESD ‘gun’.

Design techniques for EMC– Part 6: ESD etc.  Cherry Clough Consultants Jan 2000 Page 3 of 47

Bear in mind that in dry climates personnel ESD events can easily exceed 8kV. 15kV or even 20kV

is not that unusual during freezing winter conditions when the air is very dry, especially in heated

homes and buildings without humidity control. So, meeting an ESD test at ±8kV is not a guarantee

of freedom from actual ESD problems in the field, and the environment and needs of the users

should be taken into account when ESD testing to help produce reliable products.

6.1.3

Design techniques for personnel ESD

All the design techniques described in the previous parts of this series help a great deal in improving

the immunity of circuits to electric and magnetic fields, and so help circuits cope with the brief but

intense bursts of wideband disturbances from ESD events. However, they are not usually enough

on their own. The two main techniques for preventing ESD sparks from upsetting products are:

• Dielectric protection (insulation)

• Shielding (metal or metallised enclosures)

Dielectric protection is the preferred technique, but where it cannot be used for an entire product

ESD problems can occur with both internal and external connections. These are discussed

below. Apart from dielectric isolation, many of the techniques described below will also be useful

for protection against other conducted transients and surges, which have not been dealt with in

this series of articles as a separate topic.

6.1.4

Dielectric protection

This is the best ESD protection method. By not allowing an ESD spark to occur at all, not only are

sparks prevented from getting into sensitive circuitry, but no bursts of electric and magnetic fields

occur either.

Plastic enclosures, membrane keyboards, plastic knobs and control shafts, plastic switch caps,

plastic lenses, etc., are all pressed into service to insulate the product (especially the operator-

interface areas and controls). A 1mm thickness of common plastics such as PVC, polyester,

polycarbonate, or ABS, is usually more than adequate to protect from 8kV of ESD (check the

breakdown voltage rating of the material in kV/mm of thickness). But since no practical enclosure is

without seams, joints, and ventilation, the achievement of adequate creepage and clearance

distances becomes very important. Creepage is the shortest path that a current would have to take

if it ‘crept’ along all available surfaces to reach the vulnerable part, while clearance is the shortest

path to the vulnerable part through air (metal parts encountered along the way counting for zero

distance regardless of their dimensions).

Clearance is the easiest to deal with, because the breakdown voltage of air is usually around

1kV/mm. So as long as the distance from the tip of the ESD gun to the vulnerable part is at least

8mm (preferably 10 or 12mm to give a design margin) an ESD spark can’t occur.

Creepage is more difficult, because the surfaces of plastics are always contaminated with mould-

release chemicals, fingerprints, dust, etc., which attract moisture from the air and form a variable

conductivity surface. Sparks from the tips of ESD guns are often seen to follow a random path over

the surfaces of plastic enclosures, displays, keyboards, etc., sometimes for as long as 50mm as

they follow the path of least resistance through the dirt on the surface of the plastic, eventually

ending on a metal part. (Painted metal surfaces often show similar long random spark tracking,

usually leading to a pinhole defect in the paint that it takes a microscope to see.) So it is very difficult

to specify an adequate creepage distance which will protect from an ESD test, although more than

50mm is probably adequate except for polluted or wet environments.

Figure 6B shows a combined creepage and clearance design issue. A joint in a plastic enclosure

could allow an ESD spark to travel along the surfaces of the plastic, then through the air inside the

enclosure to terminate on a vulnerable PCB track. Figure 6B shows that it is usually a good idea not

to line up PCBs with seams or joints in their plastic enclosure.

Design techniques for EMC– Part 6: ESD etc.  Cherry Clough Consultants Jan 2000 Page 4 of 47

LCD displays, membrane panels, and tactile rubber keypads can be very good at preventing ESD if

a few basic precautions are taken. Although their surfaces are ESD-proof at least to 15kV, they can

have problems at their edges. ESD sparks can track along the dirt on their insulating surfaces, and

go around their edges to reach vulnerable internal tracks.

LCDs often dealt with this problem by using large bezels which prevented fingers from getting too

close to their edges. Insulating sealant and similar materials are now more likely to be used these

days. Another method is to surround the LCD panel with a metal bracket that ‘catches’ the spark

before it gets to any sensitive parts, but then something has to be done to remove the charge from

the metal surround without it discharging itself into some sensitive part.

Membrane keypads and panels have internal conductive tracks, sandwiched between glued layers

of plastic. If these tracks get too close to the edge of the panel, and if the glue has an airgap in it,

sparks can track from the front surface (where the air discharge tip is applied), around the edge,

through the void in the glue, and into the internal track, giving a false keypress if nothing worse. So

whilst all attempts should be made to ensure there are no voids in the glue, it is still best to keep

internal tracks at least 12mm from the edge of the panel (much more if possible).

Tactile rubber keypads also suffer from sparks that track through their surface dirt around the edges

of their rubber mouldings and into the vulnerable keypad tracks behind. Unlike membrane panels,

they usually don’t have the benefit of glue to provide insulation, so it is important to extend the

rubber edges of the tactile key moulding for far enough out, whilst keeping the tracks on the

underlying PCB far enough in, so that any sparks have too far to go.

When a plastic enclosure has an internal shielding coating applied to meet RF emissions or

immunity requirements, this can compromise dielectric isolation measures. For the conductive

Design techniques for EMC– Part 6: ESD etc.  Cherry Clough Consultants Jan 2000 Page 5 of 47

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