LP3985.pdf

June 2004

LP3985

Micropower, 150mA Low-Noise Ultra Low-Dropout CMOS

Voltage Regulator

General Description

The LP3985 is designed for portable and wireless applica-

tions with demanding performance and space requirements.

The LP3985 is stable with a small 1µF ± 30% ceramic or

high-quality tantalum output capacitor. The micro SMD re-

quires the smallest possible PC board area - the total appli-

cation circuit area can be less than 2.0mm x 2.5mm, a

fraction of a 1206 case size.

The LP3985’s performance is optimized for battery powered

systems to deliver ultra low noise, extremely low dropout

voltage and low quiescent current. Regulator ground current

increases only slightly in dropout, further prolonging the

battery life.

An optional external bypass capacitor reduces the output

noise without slowing down the load transient response.

Fast start-up time is achieved by utilizing an internal

power-on circuit that actively pre-charges the bypass capaci-

tor.

Power supply rejection is better than 50 dB at low frequen-

cies and starts to roll off at 1kHz. High power supply rejection

is maintained down to low input voltage levels common to

battery operated circuits.

The device is ideal for mobile phone and similar battery

powered wireless applications. It provides up to 150 mA,

from a 2.5V to 6V input. The LP3985 consumes less than

1.5µA in disable mode and has fast turn-on time less than

200µs.

The LP3985 is available in a 5 bump small bump micro SMD,

a 5 bump large bump micro SMD, a 5 bump thin micro SMD

and a 5 pin SOT-23 package. Performance is specified for

−40˚C to +125˚C temperature range and is available in 2.5V,

2.6V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0V. 3.1V, 3.2V, 3.3V, 4.7V,

4.8V and 5.0V output voltages. For other output voltage

options between 2.5V to 5.0V or for a dual LP3985, please

contact National Semiconductor sales office.

1.5µA quiescent current when shut down

n Fast Turn-On time: 200 µs (typ.)

n 100mV maximum dropout with 150mA load

n 30µVrms output noise (typ) over 10Hz to 100kHz

n −40 to +125˚C junction temperature range for operation

n 2.5V, 2.6V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0V, 3.1V, 3.2V,

3.3V, 4.7V, 4.8V and 5.0V outputs standard

Features

n Miniature 5-I/O micro SMD and SOT-23-5 package

n Logic controlled enable

n Stable with ceramic and high quality tantalum capacitors

n Fast turn-on

n Thermal shutdown and short-circuit current limit

Applications

n CDMA cellular handsets

n Wideband CDMA cellular handsets

n GSM cellular handsets

n Portable information appliances

Typical Application Circuit

10136402

Note: Pin Numbers in parenthesis indicate micro SMD package.

* Optional Noise Reduction Capacitor.

DS101364

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Key Specifications

n 2.5 to 6.0V input range

n 150mA guaranteed output

n 50dB PSRR at 1kHz @ V IN =V OUT + 0.2V

≤

Block Diagram

10136401

Pin Description

Name * micro SMD SOT Function

V EN A1 3 Enable Input Logic, Enable High

GND B2 2 Common Ground

V OUT C1 5 Output Voltage of the LDO

V IN C3 1 Input Voltage of the LDO

BYPASS A3 4 Optional Bypass Capacitor for Noise

Reduction

* The pin numbering scheme for the micro SMD package was revised in April 2002 to conform to JEDEC standard. Only the pin numbers were

revised. No changes to the physical location of the inputs/outputs were made. For reference purposes, the obsolete numbering scheme had VEN

as pin 1, GND as pin 2, VOUT as pin 3, VIN as pin 4, and BYPASS as pin 5.

Connection Diagrams

SOT 23-5 Package (MF)

5 Bump micro SMD Package (BPA05, BLA05, TLA05)

10136407

Top View

See NS Package Number MF05A

10136470

Top View

See NS Package Number BPA05, BLA05, TLA05

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Ordering Information

BP refers to 0.170mm bump size, 0.900mm height for micro SMD Package

Output

Voltage (V)

Grade

LP3985 Supplied as 250

Units, Tape and Reel

LP3985 Supplied as 3000

Units, Tape and Reel

2.5

STD

LP3985IBP-2.5

LP3985IBPX-2.5

2.6

STD

LP3985IBP-2.6

LP3985IBPX-2.6

2.7

STD

LP3985IBP-2.7

LP3985IBPX-2.7

2.8

STD

LP3985IBP-2.8

LP3985IBPX-2.8

2.85

STD

LP3985IBP-285

LP3985IBPX-285

2.9

STD

LP3985IBP-2.9

LP3985IBPX-2.9

3.0

STD

LP3985IBP-3.0

LP3985IBPX-3.0

3.1

STD

LP3985IBP-3.1

LP3985IBPX-3.1

3.2

STD

LP3985IBP-3.2

LP3985IBPX-3.2

3.3

STD

LP3985IBP-3.3

LP3985IBPX-3.3

4.7

STD

LP3985IBP-4.7

LP3985IBPX-4.7

5.0

STD

LP3985IBP-5.0

LP3985IBPX-5.0

BL refers to 0.300mm bump size, 0.995mm height for micro SMD Package

Output

Voltage (V)

Grade

LP3985 Supplied as 250

Units, Tape and Reel

LP3985 Supplied as 3000

Units, Tape and Reel

2.5

STD

LP3985IBL-2.5

LP3985IBLX-2.5

2.6

STD

LP3985IBL-2.6

LP3985IBLX-2.6

2.7

STD

LP3985IBL-2.7

LP3985IBLX-2.7

2.8

STD

LP3985IBL-2.8

LP3985IBLX-2.8

2.85

STD

LP3985IBL-285

LP3985IBLX-285

2.9

STD

LP3985IBL-2.9

LP3985IBLX-2.9

3.0

STD

LP3985IBL-3.0

LP3985IBLX-3.0

3.1

STD

LP3985IBL-3.1

LP3985IBLX-3.1

3.2

STD

LP3985IBL-3.2

LP3985IBLX-3.2

3.3

STD

LP3985IBL-3.3

LP3985IBLX-3.3

4.8

STD

LP3985IBL-4.8

LP3985IBLX-4.8

5.0

STD

LP3985IBL-5.0

LP3985IBLX-5.0

TL refers to 0.300mm bump size, 0.600mm height for micro SMD Package

Output

Voltage (V)

Grade

LP3985 Supplied as 250

Units, Tape and Reel

LP3985 Supplied as 3000

Units, Tape and Reel

2.5

STD

LP3985ITL-2.5

LP3985ITLX-2.5

2.6

STD

LP3985ITL-2.6

LP3985ITLX-2.6

2.7

STD

LP3985ITL-2.7

LP3985ITLX-2.7

2.8

STD

LP3985ITL-2.8

LP3985ITLX-2.8

2.85

STD

LP3985ITL-285

LP3985ITLX-285

2.9

STD

LP3985ITL-2.9

LP3985ITLX-2.9

3.0

STD

LP3985ITL-3.0

LP3985ITLX-3.0

3.1

STD

LP3985ITL-3.1

LP3985ITLX-3.1

3.2

STD

LP3985ITL-3.2

LP3985ITLX-3.2

3.3

STD

LP3985ITL-3.3

LP3985ITLX-3.3

4.8

STD

LP3985ITL-4.8

LP3985ITLX-4.8

5.0

STD

LP3985ITL-5.0

LP3985ITLX-5.0

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Ordering Information (Continued)

For SOT Package

Output

Voltage (V)

Grade

LP3985 Supplied as 1000

Units, Tape and Reel

LP3985 Supplied as 3000

Units, Tape and Reel

Package Marking

2.5

STD

LP3985IM5-2.5

LP3985IM5X-2.5

LCSB

2.6

STD

LP3985IM5-2.6

LP3985IM5X-2.6

LCTB

2.7

STD

LP3985IM5-2.7

LP3985IM5X-2.7

LCUB

2.8

STD

LP3985IM5-2.8

LP3985IM5X-2.8

LCJB

2.85

STD

LP3985IM5-285

LP3985IM5X-285

LCXB

2.9

STD

LP3985IM5-2.9

LP3985IM5X-2.9

LCYB

3.0

STD

LP3985IM5-3.0

LP3985IM5X-3.0

LCRB

3.1

STD

LP3985IM5-3.1

LP3985IM5X-3.1

LCZB

3.2

STD

LP3985IM5-3.2

LP3985IM5X-3.2

LDPB

3.3

STD

LP3985IM5-3.3

LP3985IM5X-3.3

LDQB

4.7

STD

LP3985IM5-4.7

LP3985IM5X-4.7

LDRB

5.0

STD

LP3985IM5-5.0

LP3985IM5X-5.0

LDSB

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Absolute Maximum Ratings (Notes 1, 2)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

V IN ,V EN

Operating Ratings (Notes 1, 2)

V IN

2.5 to 6V

V EN

0to(V IN +0.3)

≤

−0.3 to 6.5V

Junction Temperature

−40˚C to +125˚C

Thermal Resistance

θ JA (SOT23-5)

θ JA (micro SMD)

V OUT

-0.3 to (V IN +0.3)

≤

6.5V

220˚C/W

255˚C/W

Junction Temperature

150˚C

Storage Temperature

−65˚C to +150˚C

Maximum Power Dissipation

SOT23-5 (Note 6)

micro SMD (Note 6)

Lead Temp.

235˚C

250mW

244mW

Pad Temp. (Note 3)

235˚C

Maximum Power Dissipation

SOT23-5 (Note 4)

micro SMD (Note 4)

364mW

355mW

ESD Rating(Note 5)

Human Body Model

Machine Model

2kV

150V

Electrical Characteristics

Unless otherwise specified: V IN =V OUT(nom) + 0.5V, C IN = 1 µF, I OUT = 1mA, C OUT = 1 µF, C BYPASS = 0.01µF. Typical values

and limits appearing in standard typeface are for T J = 25˚C. Limits appearing in boldface type apply over the entire junction

temperature range for operation, −40˚C to +125˚C. (Note 7) (Note 8)

Symbol

Parameter

Conditions

Typ

Limit

Units

Min

Max

Output Voltage

Tolerance

I OUT = 1mA

−2

−3

%of

V OUT(nom)

Line Regulation Error

V IN =(V OUT(nom) + 0.5V) to 6.0V,

For 4.7 to 5.0 options

For all other options

∆ V OUT

−0.19

−0.1

0.19

0.1

%/V

Load Regulation Error

(Note 9)

I OUT =1mAto150mA

LP3985IM5 (SOT23-5)

0.0025

0.005

%/mA

LP3985 (micro SMD)

0.0004

0.002

Output AC Line Regulation

V IN =V OUT(nom) + 1V,

I OUT = 150 mA ( Figure 1 )

1.5

mV P-P

V IN =V OUT(nom) + 0.2V,

f = 1 kHz,

I OUT =50mA( Figure 2 )

PSRR

Power Supply Rejection Ratio

V IN =V OUT(nom) + 0.2V,

f = 10 kHz,

I OUT =50mA( Figure 2 )

I Q

Quiescent Current

V EN = 1.4V, I OUT =0mA

For 4.7 to 5.0 options

For all other options

100

165

150

V EN = 1.4V, I OUT = 0 to 150 mA

For 4.7 to 5.0 options

For all other options

µA

155

140

250

200

V EN = 0.4V

0.003

1.5

Dropout Voltage (Note 10)

I OUT =1mA

0.4

I OUT =50mA

I OUT = 100 mA

I OUT = 150 mA

100

I SC

Short Circuit Current Limit

Output Grounded

(Steady State)

600

I OUT(PK)

Peak Output Current

V OUT ≥

V OUT(nom) - 5%

550

300

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