EMIF02-USB02F2.pdf

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EMI FILTER INCLUDING ESD PROTECTION
®
EMIF02-USB02F2
IPAD™
EMI FILTER
INCLUDING ESD PROTECTION
MAIN PRODUCT CHARACTERISTICS
EMI filtering and ESD protection for USB port.
DESCRIPTION
The EMIF02-USB02F2 is a highly integrated array
designed to suppress EMI / RFI noise for USB
port.
The EMIF02-USB02F2 flip-chip packaging means
the package size is equal to the die size.
Additionally, this filter includes an ESD protection cir-
cuitry which prevents the protected device from de-
struction when subjected to ESD surges up to 15 kV.
Flip-Chip
(10 Bumps)
Table 1: Order Code
Part Number
BENEFITS
Marking
■
2 lines low-pass-filter + 2 ESD protection
EMIF02-USB02F2
FG
High efficiency in EMI filtering
■
■
Very low PCB space consuming < 3.2 mm 2
Figure 1: Pin Configuration (Ball side)
■
■
Very thin package: 0.65 mm
4
3
2
1
High efficiency in ESD suppression
■
■
High reliability offered by monolithic integration
V CC
I6
A
High reducing of parasitic elements through
integration & wafer level packaging
■
I4
I5
B
COMPLIES WITH THE FOLLOWING STANDARDS:
IEC61000-4-2 15kV (air discharge)
8kV (contact discharge)
O2
I2
C
I3
GND
D
MIL STD 883E - Method 3015-6 Class 3
O1
I1
E
Figure 2: Basic cell configuration
I6
V CC
I5
I4
R3 1.3k
Ω
D1
R2 33 Ω
R4 10k Ω
I2
O2
I3
25pF
25pF
GND
GND
25pF
25pF
I1
R1 33 Ω
O1
TM: IPAD is a trademark of STMicroelectronics.
December 2004
REV. 1
1/7
Lead Free Package
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EMIF02-USB02F2
Table 2: Absolute Ratings (T amb = 25°C)
Symbol
Parameter and test conditions
Value
Unit
V PP
ESD discharge IEC61000-4-2, air discharge
ESD discharge IEC61000-4-2, contact discharge
15
8
kV
T j
Junction temperature
125
°C
T op
Operating temperature range
- 40 to + 85
°C
T stg
Storage temperature range
- 55 to + 150
°C
Table 3: Electrical Characteristics (T amb = 25°C)
Symbol
Parameter
I
V BR Breakdown voltage
I RM Leakage current @ V RM
V RM Stand-off voltage
V CL
I PP
Clamping voltage
V CL
V BR
V RM
I R
I RM
V
I RM
I R
V RM
V BR
V CL
R d
Dynamic impedance
I PP
Peak pulse current
R I/O
Series resistance between Input &
Output
I PP
C line Input capacitance per line
Symbol
Test conditions
Min.
Typ.
Max.
Unit
V BR
I R = 1 mA
6
V
I RM
V RM = 3V
0.1
0.5
µA
C line
@ 0V
50
pF
R 1 ,R 2
Tolerance ± 5%
33
Ω
R 3
Tolerance ± 5%
1.3
k
Ω
R 4
Tolerance ± 5%
10
k
Ω
V F
@ 1 mA (D1 diode)
1
V
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EMIF02-USB02F2
Figure 3: Attenuation measurement
Figure 4: Analog crosstalk measurements (I1- O2)
0.00
dB
0.00
- 5.00
dB
- 10.00
- 10.00
- 20.00
- 15.00
- 30.00
- 20.00
- 40.00
- 25.00
- 30.00
- 50.00
- 35.00
- 60.00
- 40.00
- 70.00
- 45.00
- 80.00
- 50.00
- 90.00
100.0k
1.0M
10.0M
f/Hz
100.0M
1.0G
100.0k
1.0M
10.0M
100.0M
1.0G
f/Hz
Figure 5: ESD response to IEC61000-4-2 (+15kV
contact discharge)
Figure 6: Line capacitance versus reverse
applied voltage
40
C(pF)
35
30
25
20
15
V (V)
R
10
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
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EMIF02-USB02F2
Figure 7: Aplac model of D+ & D- cells
C1
650
650
A3
+
+
+
+
+
0.8pF
0.8pF
Csub
Csub
Csub
rsub_1k3
rsub_1k3
D2
bulk
C1 or E1
16.5
16.5
C3 or E3
50pH
Cbump
Rbump
+
I/O
bulk
+
+
+
+
+
50m
0.8pF
0.8pF
Csub
Csub
Csub
MODEL = D02_usb
rsub_33R
rsub_33R
MODEL = D02_usb
100m
D2
bulk
Lhole
MODEL = D02_usb
MODEL = D02_5p
MODEL = D02_5p
MODEL = D02_usb
Rsub_D
Rsub_D
100m
D2
D2
bulk
Figure 8: Aplac model parameters
Cz 17pF opt
Ls 0.4nH
Rs 0.1
Rsub_D 10
Csub 0.3pF
Rsub_33R 16
Rsub_1k3 18
lhole 170pH opt
Cbump 1.2pF opt
Rbump 350
D02_usb diodes model
+ BV = 7
+ IBV = 1m
+ CJO = Cz
+ M = 0.3333
+ RS = 2
+ VJ = 0.6
+ TT = 100n
D02_5p diodes model
+ BV = 100
+ IBV = 1m
+ CJO = 5p
+ M = 0.3333
+ RS = 2
+ VJ = 0.6
+ TT = 100n
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EMIF02-USB02F2
Figure 9: Ordering Information Scheme
EMIF yy - xxx zz Fx
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
Package
F = Flip-Chip
x = 1: 500µm, Bump = 315µm
= 2: Leadfree Pitch = 500µm, Bump = 315µm
Figure 10: FLIP-CHIP Package Mechanical Data
70 0µm ± 5 0
315µm ± 50
650µm ± 65
495µm ± 50
495µm ± 50
1.62mm ± 50µm
Figure 11: Foot print recommendations
Figure 12: Marking
365
240
Copper pad Diameter :
250µm recommended, 300µm max.
Dot, ST logo
xx = marking
z = packaging location
yww = datecode
(y = year
ww = week)
E
Solder stencil opening :
330µm recommended
x
y
x
w
z
w
Solder mask opening recommendation :
340µm min. for 300µm copper pad diameter
All dimensions in µm
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