PCD8544 Nokia 3310 display controller.pdf

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48 x 84 pixels matrix LCD controller/driver
INTEGRATED CIRCUITS
DATA SHEET
84 pixels matrix LCD
controller/driver
Product specification
File under Integrated Circuits, IC17
1999 Apr 12
PCD8544
48
´
251956204.028.png
Philips Semiconductors
Product specification
48
´
84 pixels matrix LCD controller/driver
PCD8544
CONTENTS
8
INSTRUCTIONS
1
FEATURES
8.1
Initialization
8.2
Reset function
2
GENERAL DESCRIPTION
8.3
Function set
3
APPLICATIONS
8.3.1
Bit PD
8.3.2
Bit V
4
ORDERING INFORMATION
8.3.3
Bit H
5
BLOCK DIAGRAM
8.4
Display control
6
PINNING
8.4.1
Bits D and E
6.1
Pin functions
8.5
Set Y address of RAM
8.6
Set X address of RAM
6.1.1
R0 to R47 row driver outputs
8.7
Temperature control
6.1.2
C0 to C83 column driver outputs
8.8
Bias value
6.1.3
V SS1 ,V SS2 : negative power supply rails
8.9
Set V OP value
6.1.4
V DD1 ,V DD2 : positive power supply rails
6.1.5
V LCD1 ,V LCD2 : LCD power supply
9
LIMITING VALUES
6.1.6
T1, T2, T3 and T4: test pads
10
HANDLING
6.1.7
SDIN: serial data line
11
DC CHARACTERISTICS
6.1.8
S CL K: serial clock line
6.1.9
D/C: mode select
12
AC CHARACTERISTICS
6.1.10
SCE: chip enable
12.1
Serial interface
6.1.11
OSC : oscillator
12.2
Reset
6.1.12
RES: reset
13
APPLICATION INFORMATION
7
FUNCTIONAL DESCRIPTION
14
BONDING PAD LOCATIONS
7.1
Oscillator
14.1
Bonding pad information
7.2
Address Counter (AC)
14.2
Bonding pad location
7.3
Display Data RAM (DDRAM)
7.4
Timing generator
15
TRAY INFORMATION
7.5
Display address counter
16
DEFINITIONS
7.6
LCD row and column drivers
17
LIFE SUPPORT APPLICATIONS
7.7
Addressing
7.7.1
Data structure
7.8
Temperature compensation
1999 Apr 12
2
251956204.029.png
Philips Semiconductors
Product specification
48
84 pixels matrix LCD controller/driver
PCD8544
1 FEATURES
2 GENERAL DESCRIPTION
·
Single chip LCD controller/driver
The PCD8544 is a low power CMOS LCD controller/driver,
designed to drive a graphic display of 48 rows and
84 columns. All necessary functions for the display are
provided in a single chip, including on-chip generation of
LCD supply and bias voltages, resulting in a minimum of
external components and low power consumption.
The PCD8544 interfaces to microcontrollers through a
serial bus interface.
·
48 row, 84 column outputs
·
Display data RAM 48
´
84 bits
·
On-chip:
– Generation of LCD supply voltage (external supply
also possible)
– Generation of intermediate LCD bias voltages
– Oscillator requires no external components (external
clock also possible).
The PCD8544 is manufactured in n-well CMOS
technology.
·
External RES (reset) input pin
·
Serial interface maximum 4.0 Mbits/s
3 APPLICATIONS
·
CMOS compatible inputs
·
Telecommunications equipment.
·
Mux rate: 48
·
Logic supply voltage range V DD to V SS : 2.7 to 3.3 V
·
Display supply voltage range V LCD to V SS
– 6.0 to 8.5 V with LCD voltage internally generated
(voltage generator enabled)
– 6.0 to 9.0 V with LCD voltage externally supplied
(voltage generator switched-off).
·
Low power consumption, suitable for battery operated
systems
·
Temperature compensation of V LCD
·
Temperature range:
-
25 to +70
°
C.
4 ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
PCD8544U
-
chip with bumps in tray; 168 bonding pads + 4 dummy pads
-
1999 Apr 12
3
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Philips Semiconductors
Product specification
48
´
84 pixels matrix LCD controller/driver
PCD8544
5 BLOCK DIAGRAM
handbook, full pagewidth
C1 to C83
R0 to R47
COLUMN DRIVERS
ROW DRIVERS
BIAS
VOLTAGE
GENERATOR
V LCD2
DATA LATCHES
SHIFT REGISTER
RESET
RES
V LCD
GENERATOR
OSCILLATOR
OSC
V LCD1
DISPLAY DATA RAM
(DDRAM)
48 ´ 84
TIMING
GENERATOR
V DD1 to V DD2
V SS1 to V SS2
DISPLAY
ADDRESS
COUNTER
T1
ADDRESS COUNTER
T2
T3
DATA
REGISTER
PCD8544
T4
I/O BUFFER
MGL629
SDIN
SCLK
D/C
SCE
Fig.1 Block diagram.
1999 Apr 12
4
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Philips Semiconductors
Product specification
48
84 pixels matrix LCD controller/driver
PCD8544
6 PINNING
6.1.5
V LCD1 ,V LCD2 : LCD POWER SUPPLY
SYMBOL DESCRIPTION
R0 to R47 LCD row driver outputs
C0 to C83 LCD column driver outputs
V SS1 ,V SS2 ground
V DD1 ,V DD2 supply voltage
V LCD1 ,V LCD2 LCD supply voltage
T1 test 1 input
T2 test 2 output
T3 test 3 input/output
T4 test 4 input
SDIN serial data input
S CL K serial clock inp ut
D/ C data/command
SCE chip enable
OSC oscillator
RES external reset input
dummy1, 2, 3, 4 not connected
Positive power supply for the liquid crystal display. Supply
rails V LCD1 and V LCD2 must be connected together.
6.1.6 T1, T2, T3 AND T4: TEST PADS
T1, T3 and T4 must be connected to V SS , T2 is to be left
open. Not accessible to user.
6.1.7
SDIN: SERIAL DATA LINE
Input for the data line.
6.1.8
SCLK: SERIAL CLOCK LINE
Input for the clock signal: 0.0 to 4.0 Mbits/s.
6.1.9
D/C: MODE SELECT
Input to select either command/address or data input.
6.1.10 SCE: CHIP ENABLE
The enable pin allows data to be clocked in. The signal is
active LOW.
Note
1. For further details, see Fig.18 and Table 7.
6.1.11 OSC: OSCILLATOR
When the on-chip oscillator is used, this input must be
connected to V DD . An external clock signal, if used, is
connected to this input. If the oscillator and external clock
are both inhibited by connecting the OSC pin to V SS , the
display is not clocked and may be left in a DC state.
To avoid this, the chip should always be put into
Power-down mode before stopping the clock.
6.1
Pin functions
6.1.1
R0 TO R47 ROW DRIVER OUTPUTS
These pads output the row signals.
6.1.2
C0 TO C83 COLUMN DRIVER OUTPUTS
These pads output the column signals.
6.1.12 RES: RESET
6.1.3
V SS1 ,V SS2 : NEGATIVE POWER SUPPLY RAILS
This signal will reset the device and must be applied to
properly initialize the chip. The signal is active LOW.
Supply rails V SS1 and V SS2 must be connected together.
6.1.4 V DD1 ,V DD2 : POSITIVE POWER SUPPLY RAILS
Supply rails V DD1 and V DD2 must be connected together.
1999 Apr 12
5
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