74HC_HCT244_CNV_2.pdf

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Octal buffer/line driver; 3-state
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
·
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
·
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
·
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT244
Octal buffer/line driver; 3-state
Product specification
File under Integrated Circuits, IC06
December 1990
21701214.007.png
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74HC/HCT244
FEATURES
The 74HC/HCT244 are octal non-inverting buffer/line
drivers with 3-state outputs. The 3-state ou tputs are
controlled by the output enable inputs 1OE and 2OE.
A HIGH on nOE causes the outputs to assume a high
impedance OFF-state. The “244” is identical to the “240”
but has non-inverting outputs.
·
Output capability: bus driver
·
I CC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT244 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; T amb =25
C; t r =t f = 6 ns
TYPICAL
SYMBOL
PARAMETER
CONDITIONS
UNIT
HC
HCT
t PHL / t PLH
propagation delay
1A n to 1Y n ;
2A n to 2Y n
C L = 15 pF; V CC =5V
9
11
ns
C I
input capacitance
3.5
3.5
pF
C PD
power dissipation capacitance per buffer notes 1 and 2
35
35
pF
Notes
1. C PD is used to determine the dynamic power dissipation (P D in
m
W):
P D =C PD ´ V CC 2
´ f i +å (C L ´ V CC 2
´ f o ) where:
f i = input frequency in MHz
f o = output frequency in MHz
å
f o ) = sum of outputs
C L = output load capacitance in pF
V CC = supply voltage in V
2. For HC the condition is V I = GND to V CC
For HCT the condition is V I = GND to V CC -
(C L ´
V CC 2
´
1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information” .
December 1990
2
°
21701214.008.png 21701214.009.png
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74HC/HCT244
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1
1OE
output enable input (active LOW)
2, 4, 6, 8
1A 0 to 1A 3
data inputs
3, 5, 7, 9
2Y 0 to 2Y 3
bus outputs
10
GND
ground (0 V)
17, 15, 13, 11 2A 0 to 2A 3
data inputs
18, 16, 14, 12 1 Y 0 to 1Y 3
bus outputs
19
2OE
output enable input (active LOW)
20
V CC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
21701214.010.png 21701214.001.png 21701214.002.png 21701214.003.png
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74HC/HCT244
FUNCTION TABLE
INPUTS
OUTPUT
nOE
nA n
nY n
L
L
H
L
H
X
L
H
Z
Note
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
Fig.4 Functional diagram.
December 1990
4
21701214.004.png 21701214.005.png
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74HC/HCT244
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” .
Output capability: bus driver
I CC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t r =t f = 6 ns; C L =50pF
T amb (
°
C)
TEST CONDITIONS
74HC
SYMBOL
PARAMETER
UNIT
WAVEFORMS
V CC
(V)
+
25
-
40 to
+
85
-
40 to
+
125
min. typ. max. min. max. min. max.
t PHL / t PLH propagation delay
1A n to 1Y n;
2A n to 2Y n
30
11
9
110
22
19
145
28
24
165
33
28
ns
2.0
4.5
6.0
Fig.5
t PZH / t PZL 3- stat e output enable time
1 OE to 1Y n;
2OE to 2Y n
36
13
10
150
30
26
190
38
33
225
45
38
ns
2.0
4.5
6.0
Fig.6
t PHZ / t PLZ 3- stat e output disable time
1 OE to 1Y n;
2OE to 2Y n
39
14
11
150
30
26
190
38
33
225
45
38
ns
2.0
4.5
6.0
Fig.6
t THL / t TLH output transition time
14
5
4
60
12
10
75
15
13
90
18
15
ns
2.0
4.5
6.0
Fig.5
December 1990
5
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