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Philips Semiconductors
Product specification
Thyristors
BT149 series
GENERAL DESCRIPTION
QUICK REFERENCE DATA
Glass passivated, sensitive gate
SYMBOL PARAMETER
MAX. MAX. MAX. MAX. UNIT
thyristors in a plastic envelope,
intended for use in general purpose
BT149
B
D
E
G
switching and phase control
V
DRM
,
Repetitive peak
200
400
500
600
V
applications. These devices are
V
RRM
off-state voltages
intended to be interfaced directly to
I
T(AV)
Average on-state
0.5
0.5
0.5
0.5
A
microcontrollers, logic integrated
current
circuits and other low power gate
I
T(RMS)
RMS on-state current 0.8
0.8
0.8
0.8
A
trigger circuits.
I
TSM
Non-repetitive peak
8
8
8
8
A
on-state current
PINNING - TO92 variant
PIN CONFIGURATION
SYMBOL
PIN
DESCRIPTION
1 cathode
a
k
2 gate
3 anode
321
g
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
BDE
G
V
DRM
, V
RRM
Repetitive peak off-state
-
200
1
400
1
500
1
600
1
V
voltages
I
T(AV)
Average on-state current half sine wave;
-
0.5
A
T
lead
£
83 ˚C
I
T(RMS)
RMS on-state current
all conduction angles
-
0.8
A
I
TSM
Non-repetitive peak
t = 10 ms
-
8
A
on-state current
t = 8.3 ms
-
9
A
half sine wave;
T
j
= 25 ˚C prior to surge
I
2
t
I
2
t for fusing
t = 10 ms
-
0.32
A
2
s
dI
T
/dt
Repetitive rate of rise of
I
TM
= 2 A; I
G
= 10 mA;
-
50
A/
m
s
on-state current after
dI
G
/dt = 100 mA/
m
s
triggering
I
GM
Peak gate current
-
1
A
V
GM
Peak gate voltage
-
5
V
V
RGM
Peak reverse gate voltage
-
5
V
P
GM
Peak gate power
-
2
W
P
G(AV)
Average gate power
over any 20 ms period
-
0.1
W
T
stg
Storage temperature
-40
150
˚C
T
j
Operating junction
-
125
˚C
temperature
1
Although not recommended, off-state voltages up to 800V may be applied without damage, but the thyristor may
switch to the on-state. The rate of rise of current should not exceed 15 A/
m
s.
September 1997
1
Rev 1.200
logic level
Philips Semiconductors
Product specification
Thyristors
BT149 series
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
R
th j-lead
Thermal resistance
-
-
60
K/W
junction to lead
R
th j-a
Thermal resistance
pcb mounted; lead length = 4mm
-
150
-
K/W
junction to ambient
STATIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise stated
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
I
GT
Gate trigger current
V
D
= 12 V; I
T
= 10 mA; gate open circuit
-
50
200
m
A
I
L
Latching current
V
D
= 12 V; I
GT
= 0.5 mA; R
GK
= 1 k
W
-
2
6
A
I
H
Holding current
V
D
= 12 V; I
GT
= 0.5 mA; R
GK
= 1 k
W
-
2
5
A
V
T
On-state voltage
I
T
= 1 A
-
1.2
1.35
V
V
GT
Gate trigger voltage
V
D
= 12 V; I
T
= 10 mA; gate open circuit
-
0.5
0.8
V
V
D
= V
DRM(max)
; I
T
= 10 mA; T
j
= 125 ˚C;
0.2
0.3
-
V
gate open circuit
I
D
, I
R
Off-state leakage current V
D
= V
DRM(max)
; V
R
= V
RRM(max)
; T
j
= 125 ˚C;
-
0.05
0.1
mA
R
GK
= 1 k
W
DYNAMIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise stated
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
dV
D
/dt
Critical rate of rise of
V
DM
= 67% V
DRM(max)
; T
j
= 125 ˚C;
-
25
-
V/
m
s
off-state voltage
exponential waveform; R
GK
= 1 k
W
t
gt
Gate controlled turn-on
I
TM
= 2 A; V
D
= V
DRM(max)
; I
G
= 10 mA;
-
2
-
m
s
time
dI
G
/dt = 0.1 A/
m
s
t
q
Circuit commutated
V
D
= 67% V
DRM(max)
; T
j
= 125 ˚C;
-
100
-
m
s
turn-off time
I
TM
= 1.6 A; V
R
= 35 V; dI
TM
/dt = 30 A/
m
s;
dV
D
/dt = 2 V/
m
s; R
GK
= 1 k
W
September 1997
2
Rev 1.200
logic level
Philips Semiconductors
Product specification
Thyristors
BT149 series
0.8
Ptot / W
BT169
Tc(max) / C
77
10
ITSM / A
BT169
conduction
angle
form
factor
a = 1.57
I
I
TSM
0.7
83
T
a
degrees
30
60
90
120
180
4
2.8
2.2
1.9
1.57
1.9
8
0.6
89
T
time
2.2
Tj initial = 25 C max
0.5
2.8
95
6
0.4
4
101
0.3
107
4
0.2
113
0.1
119
2
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
125
0
1
10
100
1000
IF(AV) / A
Number of half cycles at 50Hz
Fig.1. Maximum on-state dissipation, P
tot
, versus
average on-state current, I
T(AV)
, where
a = form factor = I
T(RMS)
/ I
T(AV)
.
Fig.4. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus number of cycles, for
sinusoidal currents, f = 50 Hz.
1000
ITSM / A
BT169
2
IT(RMS) / A
BT169
1.5
100
1
10
T
I
TSM
T
time
0.5
Tj initial = 25 C max
10us
100us
1ms
10ms
0.01
0.1
1
10
T / s
surge duration / s
Fig.2. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus pulse width t
p
, for
sinusoidal currents, t
p
£
10ms.
Fig.5. Maximum permissible repetitive rms on-state
current I
T(RMS)
, versus surge duration, for sinusoidal
currents, f = 50 Hz; T
lead
£
83˚C.
1
IT(RMS) / A
BT169
VGT(Tj)
VGT(25 C)
BT151
1.6
0.8
83 C
1.4
0.6
1.2
1
0.4
0.8
0.2
0.6
0
-50
0
50
100
150
0.4
-50
0
50
100
150
Tlead / C
Tj / C
Fig.3. Maximum permissible rms current I
T(RMS)
,
versus lead temperature, T
lead
.
Fig.6. Normalised gate trigger voltage
V
GT
(T
j
)/ V
GT
(25˚C), versus junction temperature T
j
.
September 1997
3
Rev 1.200
logic level
I
1
0
Philips Semiconductors
Product specification
Thyristors
BT149 series
IGT(Tj)
IGT(25 C)
5
IT / A
BT169
BT169
3
Tj = 125 C
Tj = 25 C
2.5
4
Vo = 1.067 V
Rs = 0.187 ohms
typ
max
2
3
1.5
2
1
1
0.5
0
-50
0
50
100
150
0
0
0.5
1
1.5
2
2.5
Tj / C
VT / V
Fig.7. Normalised gate trigger current
I
GT
(T
j
)/ I
GT
(25˚C), versus junction temperature T
j
.
Fig.10. Typical and maximum on-state characteristic.
IL(Tj)
IL(25 C)
100
Zth j-lead (K/W)
BT169
BT169
3
2.5
10
2
1.5
1
P
t
p
1
D
0.1
0.5
t
0
0.01
10us
0.1ms
1ms
10ms
0.1s
1s
10s
-50
0
50
100
150
Tj / C
tp / s
Fig.8. Normalised latching current I
L
(T
j
)/ I
L
(25˚C),
versus junction temperature T
j
, R
GK
= 1 k
W
.
Fig.11. Transient thermal impedance Z
th j-lead
, versus
pulse width t
p
.
IH(Tj)
IH(25 C)
1000
dVD/dt (V/us)
BT169
3
2.5
2
100
RGK = 1 kohms
1.5
1
10
0.5
0
-50
0
50
100
150
1
0
50
100
150
Tj / C
Tj / C
Fig.9. Normalised holding current I
H
(T
j
)/ I
H
(25˚C),
versus junction temperature T
j
, R
GK
= 1 k
W
.
Fig.12. Typical, critical rate of rise of off-state voltage,
dV
D
/dt versus junction temperature T
j
.
September 1997
4
Rev 1.200
logic level
Philips Semiconductors
Product specification
Thyristors
BT149 series
MECHANICAL DATA
Dimensions in mm
2.54
Net Mass: 0.2 g
0.66
0.56
1.6
4.8 max
4.2 max
5.2 max
2.5 max
12.7 min
3
2
1
0.48
0.40
0.40
min
Fig.13. TO92; plastic envelope.
Notes
1. Epoxy meets UL94 V0 at 1/8".
September 1997
5
Rev 1.200
logic level
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