LF155_LF156_LF157.pdf

December 1994

LF155/LF156/LF157 Series Monolithic

JFET Input Operational Amplifiers

General Description

These are the first monolithic JFET input operational ampli-

fiers to incorporate well matched, high voltage JFETs on the

same chip with standard bipolar transistors (BI-FET TM Tech-

nology). These amplifiers feature low input bias and offset

currents/low offset voltage and offset voltage drift, coupled

with offset adjust which does not degrade drift or common-

mode rejection. The devices are also designed for high slew

rate, wide bandwidth, extremely fast settling time, low volt-

age and current noise and a low 1/f noise corner.

Y Photocell amplifiers

Y Sample and Hold circuits

Common Features

(LF155A, LF156A, LF157A)

Y Low input bias current

30 pA

Y Low Input Offset Current

3 pA

Y High input impedance

10 12 X

Y Low input offset voltage

1 mV

Advantages

Y Replace expensive hybrid and module FET op amps

Y Rugged JFETs allow blow-out free handling compared

with MOSFET input devices

Y Excellent for low noise applications using either high or

low source impedanceÐvery low 1/f corner

Y Offset adjust does not degrade drift or common-mode

rejection as in most monolithic amplifiers

Y New output stage allows use of large capacitive loads

(5,000 pF) without stability problems

Y Internal compensation and large differential input volt-

age capability

Y Low input offset voltage temp. drift

3 m V/ § C

Y Low input noise current

0.01 pA/

Y High common-mode rejection ratio

100 dB

Y Large dc voltage gain

106 dB

Uncommon Features

LF155A LF156A

LF157A

Units

(A V e 5)

Y Extremely

fast settling

time to

0.01%

Y Fast slew

rate

Y Wide gain

bandwidth

Y Low input

noise voltage

1.5

1.5 m s

Applications

Y Precision high speed integrators

Y Fast D/A and A/D converters

Y High impedance buffers

Y Wideband, low noise, low drift amplifiers

Y Logarithmic amplifiers

50 V/ m s

2.5

20 MHz

12 nV/

Simplified Schematic

*3 pF in LF157 series.

TL/H/5646±1

BI-FET TM , BI-FET II TM are trademarks of National Semiconductor Corporation.

C 1995 National Semiconductor Corporation

TL/H/5646

RRD-B30M115/Printed in U. S. A.

Absolute Maximum Ratings

If Military/Aerospace specified devices are required, contact the National Semiconductor Sales Office/Distributors for

availability and specifications.

(Note 8)

LF155A/6A/7A

LF155/6/7

LF355B/6B/7B

LF355/6/7

LF255/6/7

LF355A/6A/7A

Supply Voltage

g 22V

g 18V

Differential Input Voltage

g 40V

g 30V

Input Voltage Range (Note 2)

g 20V

g 16V

Output Short Circuit Duration

Continuous

T jMAX

H-Package

150 § C

115 § C

N-Package

100 § C

M-Package

100 § C

Power Dissipation at T A e 25 § C (Notes 1 and 9)

H-Package (Still Air)

560 mW

400 mW

H-Package (400 LF/Min Air Flow)

1200 mW

1000 mW

N-Package

670 mW

M-Package

380 mW

Thermal Resistance (Typical) i JA

H-Package (Still Air)

160 § C/W

H-Package (400 LF/Min Air Flow)

65 § C/W

N-Package

130 § C/W

M-Package

195 § C/W

(Typical) i JC

H-Package

23 § C/W

Storage Temperature Range

b 65 § Cto a 150 § C b 65 § Cto a 150 § C b 65 § Cto a 150 § C b 65 § Cto a 150 § C

Soldering Information (Lead Temp.)

Metal Can Package

Soldering (10 sec.)

300 § C

Dual-In-Line Package

Soldering (10 sec.)

260 § C

Small Outline Package

Vapor Phase (60 sec.) 215 § C 215 § C

Infrared (15 sec.) 220 § C 220 § C

See AN-450 ``Surface Mounting Methods and Their Effect on Product Reliability'' for other methods of soldering surface

mount devices.

ESD tolerance

(100 pF discharged through 1.5 k X )

1000V

DC Electrical Characteristics (Note 3) T A e T j e 25 § C

LF155A/6A/7A

LF355A/6A/7A

Symbol

Parameter

Conditions

Units

Min Typ Max Min Typ Max

V OS

Input Offset Voltage R S e 50 X ,T A e 25 § C

2 mV

Over Temperature

2.5

2.3 mV

Offset Voltage

D TC/ D V OS Change in Average TC R S e 50 X , (Note 4)

5 m V/ § C

with V OS Adjust

0.5

m V/ § C

I OS

Input Offset Current

T j e 25 § C, (Notes 3, 5)

T j s T HIGH

I B

Input Bias Current

T j e 25 § C, (Notes 3, 5)

T j s T HIGH

R IN

Input Resistance

T j e 25 § C

10 12

A VOL

Large Signal Voltage V S e g 15V, T A e 25 § C 50 200

50 200

V/mV

Gain

V O e g 10V, R L e 2k

V/mV

Over Temperature

V O

Output Voltage Swing V S e g 15V, R L e 10k g 12 g 13

g 12 g 13

V S e g 15V, R L e 2k g 10 g 12

g 10 g 12

D V OS / D T Average TC of Input R S e 50 X

per mV

DC Electrical Characteristics (Note 3) T A e T j e 25 § C (Continued)

Symbol

Parameter

Conditions

LF155A/6A/7A

LF355A/6A/7A

Units

Min

Typ Max Min

Typ Max

V CM

Input Common-Mode

V S e g 15V g 11

a 15.1

g 11

a 15.1

Voltage Range

b 12

CMRR Common-Mode Rejection

100

Ratio

PSRR Supply Voltage Rejection (Note 6)

100

Ratio

AC Electrical Characteristics T A e T j e 25 § C, V S e g 15V

Symbol

Parameter

Conditions

LF155A/355A LF156A/356A LF157A/357A

Units

Min Typ Max Min Typ Max Min Typ Max

Slew Rate

LF155A/6A; A V e 1, 3 5

10 12

V/ m s

LF157A; A V e 5

40 50

V/ m s

GBW Gain Bandwidth

2.5

4 4.5

15 20

MHz

Product

t s

Settling Time to 0.01% (Note 7)

1.5

m s

e n

Equivalent Input Noise R S e 100 X

Voltage

f e 100 Hz

nV/

f e 1000 Hz

nV/

i n

Equivalent Input

f e 100 Hz

0.01

pA/

Noise Current

f e 1000 Hz

0.01

pA/

C IN

Input Capacitance

DC Electrical Characteristics (Note 3)

LF155/6/7

LF255/6/7

LF355/6/7

Symbol

Parameter

Conditions

LF355B/6B/7B

Min Typ Max Min Typ Max Min Typ Max

Units

V OS

Input Offset Voltage R S e 50 X ,T A e 25 § C

3 5

3 10 mV

Over Temperature

6.5

13 mV

Offset Voltage

D TC/ D V OS Change in Average TC R S e 50 X , (Note 4)

m V/ § C

0.5

m V/ § C

with V OS Adjust

per mV

I OS

Input Offset Current T j e 25 § C, (Notes 3, 5)

3 20

3 50 pA

T j s T HIGH

2 nA

I B

Input Bias Current T j e 25 § C, (Notes 3, 5)

30 100

30 200 pA

T j s T HIGH

8 nA

R IN

Input Resistance

T j e 25 § C

10 12

A VOL

Large Signal Voltage V S e g 15V, T A e 25 § C 50 200

50 200

25 200

V/mV

Gain

V O e g 10V, R L e 2k

Over Temperature

V/mV

V O

Output Voltage Swing V S e g 15V, R L e 10k g 12 g 13 g 12 g 13 g 12 g 13

V S e g 15V, R L e 2k g 10 g 12 g 10 g 12 g 10 g 12

V CM

Input Common-Mode

V S e g 15V

g 11 a 15.1

g 11 g 15.1

a 10 a 15.1

Voltage Range

b 12

CMRR Common-Mode Rejec-

85 100

80 100

tion Ratio

PSRR Supply Voltage Rejec- (Note 6)

85 100

80 100

tion Ratio

D V OS / D T Average TC of Input R S e 50 X

DC Electrical Characteristics T A e T j e 25 § C, V S e g 15V

LF155A/155,

LF156A/156,

LF157A/157

LF255,

LF355

LF356A/356

LF357A/357

LF256/356B

LF257/357B

Parameter

Units

LF355A/355B

Typ Max Typ Max Typ Max Typ Max Typ Max Typ Max

Supply Current 2

2 4

10 mA

AC Electrical Characteristics T A e T j e 25 § C, V S e g 15V

LF155/255/ LF156/256, LF156/256/ LF157/257, LF157/257/

Symbol

Parameter

Conditions 355/355B LF356B 356/356B LF357B 357/357B Units

Typ

Min

Typ

Min

Typ

SR Slew Rate

LF155/6: A V e 1,

7.5

V/ m s

LF157: A V e 5

V/ m s

GBW Gain Bandwidth

2.5

20 MHz

Product

t s

Settling Time to 0.01% (Note 7)

1.5

m s

e n

Equivalent Input Noise R S e 100 X

Voltage

f e 100 Hz

nV/

f e 1000 Hz

nV/

i n

Equivalent Input

f e 100 Hz

0.01

0.01 pA/

Current Noise

f e 1000 Hz

0.01

0.01 pA/

C IN Input Capacitance

Notes for Electrical Characteristics

Note 1: The maximum power dissipation for these devices must be derated at elevated temperatures and is dictated by T jMAX , i jA , and the ambient temperature,

T A . The maximum available power dissipation at any temperature is P d e (T jMAX b T A )/ i jA or the 25 § CP dMAX , whichever is less.

Note 2: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.

Note 3: Unless otherwise stated, these test conditions apply:

LF155A/6A/7A

LF255//6/7

LF355A/6A/7A LF355B/6B/7B LF355//6/7

LF155//6/7

Supply Voltage, V S g 15V s V S s g 20V

g 15V s V S s g 20V

g 15V s V S s g 18V

g 15V s V S g 20V V S e g 15V

T A

b 55 § C s T A sa 125 § C b 25 § C s T A sa 85 § C § C s A sa 70 § C § s A sa 70 § C § C s A sa 70 § C

T HIGH

a 125 § C

a 85 § C

a 70 § C

and V OS ,I B and I OS are measured at V CM e 0.

Note 4: The Temperature Coefficient of the adjusted input offset voltage changes only a small amount (0.5 m V/ § C typically) for each mV of adjustment from its

original unadjusted value. Common-mode rejection and open loop voltage gain are also unaffected by offset adjustment.

Note 5: The input bias currents are junction leakage currents which approximately double for every 10 § C increase in the junction temperature, T J . Due to limited

production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient

temperature as a result of internal power dissipation, Pd. T j e T A ai jA Pd where i jA is the thermal resistance from junction to ambient. Use of a heat sink is

recommended if input bias current is to be kept to a minimum.

Note 6: Supply Voltage Rejection is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with common practice.

Note 7: Settling time is defined here, for a unity gain inverter connection using 2 k X resistors for the LF155/6. It is the time required for the error voltage (the

voltage at the inverting input pin on the amplifier) to settle to within 0.01% of its final value from the time a 10V step input is applied to the inverter. For the LF157,

A V eb 5, the feedback resistor from output to input is 2 k X and the output step is 10V (See Settling Time Test Circuit).

Note 8: Refer to RETS155AX for LF155A, RETS155X for LF155, RETS156AX for LF156A, RETS156X for LF156, RETS157A for LF157A and RETS157X for

LF157 military specifications.

Note 9: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate

outside guaranteed limits.

Typical DC Performance Characteristics

Curves are for LF155, LF156 and LF157 unless otherwise specified.

Input Bias Current

Voltage Swing

Supply Current

Negative Current Limit

Positive Current Limit

Positive Common-Mode

Input Voltage Limit

TL/H/5646±2

Negative Common-Mode

Input Voltage Limit

Open Loop Voltage Gain

Output Voltage Swing

TL/H/5646±3

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