The NES sound channel guide 1.6 Written by Brad Taylor. btmine@hotmail.com Last updated: June 11th, 2000. All results were obtained by studying prior information available (from nestech 1.00, and postings on NESDev from miscellanious people), and through a series of experiments conducted by me. Results acquired by individuals prior to my reverse-engineering have been double checked, and final results have been confirmed. Credit is due to those individual(s) who contributed any information in regards to the the miscellanious sound channels wihtin the NES. A special thanks goes out to Matthew Conte, for his expertise on pseudo-random number generation (amoung other things), which allowed for the full reverse engineering of the NES's noise channel to take place. Without his help, I would still be trying to find a needle in a haystack, as far as the noise's method of pseudo-random number generation goes. Additionally, his previous findings / reverse engineering work on the NES's sound hardware really got the ball of NES sound emulation rolling. If it weren't for Matt's original work, this document wouldn't exist. **************** * Introduction * **************** The 2A03 (NES's integrated CPU) has 4 internal channels to it that have the ability to generate semi-analog sound, for musical playback purposes. These channels are 2 square wave channels, one triangle wave channel, and a noise generation channel. This document will go into full detail on every aspect of the operation and timing of the mentioned sound channels. ******************* * Channel details * ******************* Each channel has different characteristics to it that make up it's operation. The square channel(s) have the ability to generate a square wave frequency in the range of 54.6 Hz to 12.4 KHz. It's key features are frequency sweep abilities, and output duty cycle adjustment. The triangle wave channel has the ability to generate an output triangle wave with a resolution of 4-bits (16 steps), in the range of 27.3 Hz to 55.9 KHz. The key features this channel has is it's analog triangle wave output, and it's linear counter, which can be set to automatically disable the channel's sound after a certain period of time has gone by. The noise channel is used for producing random frequencys, which results in a "noise" sounding output. Output frequencys can range anywhere from 29.3 Hz to 447 KHz. It's key feature is it's pseudo- random number generator, which generates the random output frequencys heard by the channel. ***************** * Frame counter * ***************** The 2A03 has an internal frame counter. It has the ability to generate 60 Hz (1/1 framerate), 120 Hz (1/2 framerate), and 240 Hz (1/4 framerate) signals, used by some of the sound hardware. The 1/4 framerate is calculated by taking twice the CPU clock speed (3579545 Hz), and dividing it by 14915. ************************ * Sound hardware delay * ************************ Prior to resetting the 2A03, the first time any sound channel(s) length counter contains a non-zero value (channel is enabled), there will be a 2048 CPU (1.79MHz) clock cycle delay before any of the sound hardware is clocked. After the 2K clock cycles go by, the NES sound hardware will be clocked normally. This phenomenon only occurs prior to a system reset, and only occurs during the first 2048 CPU clocks for any sound channel prior to a sound channel being enabled. The information in regards to this delay is only provided to keep this entire document persistently accurate on the 2A03's sound hardware, but may not be 100% accurate in itself. I haven't done much tests on the behaviour of this delay (mainly because I don't care, as I view it as a inconvenience anyway), so that's why I believe there could be some inaccuracies. ************************ * Register Assignments * ************************ The sound hardware internal to the 2A03 has been designated these special memory addresses in the CPU's memory map. $4000-$4003 Square wave 1 $4004-$4007 Square wave 2 (identical to the first) $4008-$400B Triangle $400C-$400F Noise $4015 Channel enable / length counter status Note that $4015 is the only R/W register. All others are write only (attempt to read them will most likely result in a returned 040H, due to heavy capacitance on the NES's data bus). Reading a "write only" register, will have no effect on the specific register, or channel. Every sound channel has 4 registers affiliated with it. The description of the register sets are as follows: +----------------+ | Register set 1 | +----------------+ $4000(sq1)/$4004(sq2)/$400C(noise) bits --------------------------------------- 0-3 volume / envelope decay rate 4 envelope decay disable 5 length counter clock disable / envelope decay looping enable 6-7 duty cycle type (unused on noise channel) $4008(tri) bits --------------- 0-6 linear counter load register 7 length counter clock disable / linear counter start +----------------+ | Register set 2 | +----------------+ $4001(sq1)/$4005(sq2) bits -------------------------- 0-2 right shift amount 3 decrease / increase (1/0) wavelength 4-6 sweep update rate 7 sweep enable $4009(tri)/$400D(noise) bits ---------------------------- 0-7 unused +----------------+ | Register set 3 | +----------------+ $4002(sq1)/$4006(sq2)/$400A(Tri) bits ------------------------------------- 0-7 8 LSB of wavelength $400E bits ---------- 0-3 playback sample rate 4-6 unused 7 random number type generation +----------------+ | Register set 4 | +----------------+ $4003(sq1)/$4007(sq2)/$400B(tri)/$400F(noise) bits -------------------------------------------------- 0-2 3 MS bits of wavelength (unused on noise channel) 3-7 length counter load register +--------------------------------+ | length counter status register | +--------------------------------+ $4015(read) - length counter status register ----------- 0 square wave channel 1 1 square wave channel 2 2 triangle wave channel 3 noise channel 4 DMC (see "DMC.TXT" for details) 5-6 unused 7 IRQ status of DMC (see "DMC.TXT" for details) +-------------------------+ | channel enable register | +-------------------------+ $4015(write) ------------ 0 square wave channel 1 1 square wave channel 2 2 triangle wave channel 3 noise channel 4 DMC channel (see "DMC.TXT" for details) 5-7 unused ************************ * Channel architecture * ************************ This section will describe the internal components making up each individual channel. Each component will then be described in full detail. Device Triangle Noise Square ------ -------- ------ ------ triangle step generator X linear counter X programmable timer X X X length counter X X X 4-bit DAC X X X volume/envelope decay unit X X sweep unit X duty cycle generator X wavelength converter X random number generator X +-------------------------+ | Triangle step generator | +-------------------------+ This is a 5-bit, single direction counter, and it is only used in the triangle channel. Each of the 4 LSB outputs of the counter lead to one input on a corresponding mutually exclusive XNOR gate. The 4 XNOR gates have been strobed together, which results in the inverted representation of the 4 LSB of the counter appearing on the outputs of the gates when the strobe is 0, and a non-inverting action taking place when the strobe is 1. The strobe is naturally connected to the MSB of the counter, which effectively produces on the output of the XNOR gates a count sequence which reflects the scenario of a near- ideal triangle step generator (D,E,F,F,E,D,...,2,1,0,0,1,2,...). At this point, the outputs of the XNOR gates will be fed into the input of a 4-bit DAC. The 5-bit counter will be halted whenever the Triangle channel's length or linear counter contains a count of 0. This results in a "latching" behaviour; the counter will NOT be reset to any definite state. On system reset, this counter is loaded with 0. The counter's clock input is connected directly to the terminal count output pin of the 11-bit programmable timer in the triangle channel. As a result of the 5-bit triangle step generator, the output triangle wave frequency will be 32 times less than the frequency of the triangle channel's programmable timer is set to generate. +----------------+ | Linear counter | +----------------+ The linear counter is only found in the triangle channel. It is a 7-bit presettable down counter, with a decoded output condition of 0 available (not exactly the same as terminal count). Here's the bit assignments: $4008 bits ---------- 0-6 bits 0-6 of the linear counter load register (NOT the linear counter itself) 7 linear counter start The counter is clocked at 240 Hz (1/4 framerate), and the calculated length in frames is 0.25*N, where N is the 7-bit loaded value. The counter is always being clocked, except when 0 appears on the output of the counter. At this point, the linear counter & triangle step counter clocks signals are disabled, which results in both counters latching their current state (the linear counter will stay at 0, and the triangle step counter will stop, and the channel will be silenced due to this). The linear counter has 2 modes: load, and count. When the linear counter is in load mode, it essentially becomes transparent (i.e. whatever value is currently in, or being written to $4008, will appear on the output of the counter). Because of this, no count ...
Extreme-P