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design
ideas
Edited by Bill Schweber
The best of
design ideas
Check it out at:
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Digitally control room light intensity
Donal McNamara, Analog Devices, Limerick, Ireland and
Kieran Kelly, Analog Devices, Limerick, Ireland.
and temperature settings for dif-
ferent rooms depending upon their
mood or whether they are working or re-
laxing. The circuit in Figure 1 controls
the intensity of the artificial light in a
room and monitors the temperature of
two zones. The two main circuit blocks
are the PIC16C67 master controller and
the ADT7516 temperature-sensor inter-
face, which includes a four-channel ADC
and a quad voltage-output DAC. Other
components include a photodiode and
an op amp that monitor the ambient
light; a rotary potentiometer that sets the
light intensity; an LED bar array and dis-
play driver, which indicate the light-in-
tensity setting; a light-dimmer-control
circuit; and a 16
which indicates the temperature of the
two zones.
On power-up, the PIC16C67 config-
ures its ports to control the LCD and the
ADT7516. The ADT7516 has a dual in-
terface, comprising I 2 C and SPI, so the
master communicates in SPI mode. The
ADT7516 operates in SPI mode, once the
controller initializes the LCD.
The ADT7516 senses both its internal
temperature and the temperature of a re-
mote thermal diode (Q 1 configured as a
diode), and the PIC16C67 displays these
temperatures on the LCD. One of the
ADT7516’s analog inputs monitors a po-
tentiometer that you adjust to set the re-
quired light intensity. The PIC controller
reads the potentiometer value from the
ADT7516 and outputs a corresponding
Digitally control room light intensity ...... 103
Circuit tests V COM drivers ............................ 104
Use two picogate devices
for bidirectional level-shifting.................... 106
Simple nanosecond-width pulse
generator provides high performance .. 108
Accurately measure resistance with
less-than-perfect components .................. 110
Publish your Design Idea in EDN . See the
What’s Up section at www.edn.com.
two-character LCD,
DAC value. The DAC controls an
LM3914 LED-bar-array controller that
shows the potentiometer setting on the
array. If you set the potentiometer half-
LED BAR
ARRAY
V D D
LM3914
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
Figure 1
V D D
LED1
LED2
LED3
LED4
LED5
LED6
LED7
LED8
LED9
LED10
A microcontroller, a temperature
sensor with an A/D converter, and a
few other components form a smart
room-light-intensity controller.
GND
V D D
6
V DD
IC 1
ADT7516
V OUTA
V OUTB
V OUTC
V OUTD
2
INPUT
DIMMER CIRCUITRY
LAMP
1
5
GND
MAINS SUPPLY
400V
TR1AC
MOC3020
16
V D D
E
7
D+/A IN1 /A IN1+
15
2N3908
EXTERNAL
TEMPERATURE
SENSOR
Q 1
B
PIC16C67
LCD
R 2
13k
8
D–/A IN2 /A IN2–
4
C
CS
PORT B6
PORT D
9
L DAC /A IN3
10
INTERRUPT
R 1
1M
DIAL
R 3
10k
14
D OUT /ADD
SOA/DIN
11
16TWO-
CHARACTER
LCD
A IN4
PORT B4
PORT B8
PORT B7
15V
12
PORT B2
PORT B1
PORT B0
3
3
V REFIN
+
7
SCL/SCLK
13
IC 2
OP07
5
2
_
4
D 1
PHOTODIODE
–15V
www.edn.com
NOVEMBER 11, 2004 | EDN 103
M ANY PEOPLE FAVOR different light
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design
ideas
way, for example, then half of the LEDs
turn on, indicating that you want an in-
tensity that is half of what the light source
can deliver.
A second DAC output controls a
DIAC-based (X1) light-dimmer circuit.
This dimmer circuit operates like any
other light dimmer, except that the DAC
controls it instead of a potentiometer. A
photodiode monitors the intensity from
the light bulb. An OP07 amplifies its out-
put and feeds it into one of the
ADT7516’s analog inputs. The PIC con-
troller uses the potentiometer and pho-
todiode values, which the ADT7516 dig-
itizes, to maintain equilibrium between
the light intensity and the required light
setting. If the photodiode reading is less
than the potentiometer setting, the con-
troller increases the dimmer DAC value;
it decreases the dimmer DAC value if the
reading is greater.
One of the features of the ADT7516 is
its round-robin mode, in which it con-
stantly monitors all of its measurement
channels. The master need not initialize
any conversions during its operation; all
it has to do is read back from four value
registers and act according to its pro-
gram. This circuit ensures a constant light
intensity within a room, saving power
when daylight takes over as the main light
source. It also extends the lifetime of a
light bulb, thus saving on maintenance
bills in a large office environment. You
can also extend the application to include
control of air conditioning and to mem-
orize heat and light settings that suit in-
dividuals tastes.
Circuit tests V COM drivers
Soufiane Bendaoud, Analog Devices, San Jose, CA
F LAT-PANEL LCD mon-
300
use, such as NTSC, PAL, or
SECAM. Computers, on
the other hand, typically
refresh the screen at a 75-
Hz rate. A single picture el-
ement, or pixel, on an LCD
screen comprises three
subpixels, one each of red,
green, and blue.
Electrically, the subpix-
els behave like capacitors,
storing a certain voltage
until the next voltage ar-
rives. Changing the volt-
ages on the subpixels, one row at a time,
refreshes the screen. These voltages use
V COM as a reference. The absolute value of
the voltage differences, V COM , represents
the brightness of the subpixels. The video
signal undergoes inversion
on a frame-by-frame basis
to ensure that the time av-
erage of the pixel voltages
is zero, thus preventing
screen burnout. The cir-
cuit of Figure 1 tests the
V COM driver by applying a
square wave to a capacitor
array representing the sub-
pixels in the panel. This
circuit simulates the worst-
case condition, in which all
the subpixels switch on or
off simultaneously. A pair
of high-power, low-on-
resistance MOSFETs gen-
erates the square wave.
A nonoverlapping drive
itors offer excellent
image quality and
more compact form factor
than CRTs—hence, their
steadily increasing popu-
larity. Unfortunately, the
complexity of their manu-
facturing process makes
LCD monitors consider-
ably more expensive than
CRTs. The amplifier
that drives V COM , the
voltage on the backplane of
the LCD panel, must be able to drive large
capacitive loads, deliver high peak output
currents, and maintain a constant output
voltage. This Design Idea describes a
simple test to measure the usefulness of
3k
8V
1k
2
_
V
10
10
10
10
AD8665
3
+
V+
10 nF 10 nF
10 nF
10 nF
1k
0 TO 8V
SQUARE WAVE
Figure 1
In this typical V COM driver, an array of capacitors simulates the
subpixel load.
an amplifier used as a V COM driver. First,
consider some video theory. Flat-panel
television screens differ in the rate at
which the screen refreshes. The refresh
rate for TVs depends on the standard you
8V
8V
R 1
200
V OUT2
1
2
3
1
2
3
1
2
1
2
3
3
IRF9521
V1
C 1
100 pF
74HC00
74HC00
74HC00
74HC00
IRF4905
8V
IRF730
Figure 2
V OUT1
1
1
2
3
1
2
3
IRF9521
3
2
74HC00
74HC00
74HC00
MTP3055
IRF730
An array of NAND gates drives power MOSFETs in this V COM test circuit.
104 EDN | NOVEMBER 11, 2004
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design
ideas
scheme ensures that both MOSFETs do
not turn on at the same time. Otherwise,
simultaneous conduction would give rise
to high shoot-through currents. Figure
2 shows the MOSFETs and the nonover-
lapping drive scheme. The drive scheme
uses high-speed NAND gates. An RC
network at the input of the second
NAND gate controls the nonoverlap de-
lay. The first pair of MOSFETs acts as
predrivers to provide the current needed
to drive the power-MOSFET output
stage. Figure 3 shows the nonoverlap-
ping drive to the gates of the output
stage. Figure 4 shows the instantaneous
peak output current of the AD8565 in
Figure 1 in response to a pulse from the
test circuit.
10V
V OUT2
5V
CH 2=100 nA/DIV
SEL>>
0V
10V
V(R36:1)
V OUT1
5V
CH 1=5V/DIV
0V
0s
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
V(R37:1)
TIME (SEC)
TIME (2 SEC/DIV)
Nonoverlapping gate drive prevents large shoot-through
currents in the output stage of Figure 2’s circuit.
Figure 4
The AD8565 exhibits peak currents greater
than 250 mA in response to a test-circuit pulse.
Use two picogate devices
for bidirectional level-shifting
Bob Marshall, Philips Semiconductors
I N NEW MIXED-VOLTAGE systems, it is
V CC LOW
often necessary to level-shift a control
signal from a high level to a low level.
An open-drain device, such as the
74LVC1G07, easily performs this shift.
However, when a bidirectional signal re-
quires level-shifting, it takes a bit more
circuitry, because simply tying two open-
drain devices pins together generates just
a latch function.
The circuit in Figure 1 shows how to
connect the 74LVC2G241 and 74LVC-
2G07 devices together to shift the signal
at A from a high level to a low
voltage at B and to shift a low lev-
el at B to a higher level at A. The DIR sig-
nal controls the direction of the transfer.
When DIR is low, the A side is the input,
and the B side is output. When DIR is
high, B becomes the input, and A be-
comes the output. To have B behave as an
input when the DIR signal is low, redo the
circuit so that Pin 3 of the 74LVC2G241
DIR
1
7
5
I/O A
2
6
1
6
I/O B
LVC2G241
LVC2G07
3
5
4
3
2
4
8
Figure 1
V CC HIGH
A two-IC circuit allows signal level-shifting in both directions; signal-flow direction is under circuit
control.
becomes the input to Pin 1 of the
74LVC2G07 and Pin 4 of the 74LVC2G07
becomes the input to Pin 2 of the
74LVC2G241.
The highest voltage V CC should supply
the 74LVC2G241, and the lowest voltage
level supply necessary should supply the
74LVC2G07. For example, to shift a sig-
nal from 3.3 to 1.8V, the 1.8V CC should
supply the 74LVC2G07 device. The size
106 EDN | NOVEMBER 11, 2004
www.edn.com
Figure 3
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design
ideas
of the pullup resistor is unimportant,
but, for best speed, it should be as small
as practical to reduce the RC change time
of the output signal of the 74LVC2G07.
The current output of the74LVC07A is 24
mA at 3.3V; at that V CC , the pullup resis-
. It should be
as large as possible to reduce power con-
sumption.
The 74LVC2G07 supply level deter-
mines V OL and V OH at B. At 1.8V, the V OH
would be near V CC , and V OL is 0.45V or
lower when driving a 4-mA load. The
74LVC2G07 and 74LVC2G241 provide a
quick and easy way to obtain a bidirec-
tional level translation and take up little
board space.
Simple nanosecond-width pulse generator
provides high performance
Jim Williams, Linear Technology Corp
pulses in response to an input and trig-
ger, such as for sampling applications,
the predictably programmable short-
time-interval generator has broad uses.
The circuit of Figure 1 , built around a
quad high-speed comparator and a high-
speed gate, has settable 0- to 10-nsec out-
put width with 520-psec, 5V transitions.
Pulse width varies less than 100 psec with
5V supply variations of 65%. The mini-
mum input-trigger width is 30 nsec, and
input-output delay is 18 nsec.
Comparator IC 1 inverts the input
pulse ( Figure 2 , Trace A) and isolates the
50
A=5V/01V
Comparators IC 2 and IC 3 , arranged as
complementary-output-level detectors,
represent the networks’ delay difference as
edge-timing skew. Trace B is IC 3 ’s fixed-
path output, and Trace C is IC 2 ’s variable
output. Gate G 1 ’s output (Trace D), which
is high during IC 2 -IC 3 positive overlap,
presents the circuit output pulse. Figure 2
shows a 5V, 5-nsec width, measured at
50% amplitude, output pulse with
R
B=5V/01V
C=5V/01V
D=5V/01V
10nSEC/DIV
. The pulse is clean and has well-
defined transitions. Post-transition aber-
rations, within 8%, derive from G 1 ’s
bond-wire inductance and an imperfect
Figure 2
Pulse-generator wave-
forms, viewed in 400-MHz
real-time bandwidth, include input (Trace A),
IC 3 (Trace B) fixed and IC 2 (Trace C) variable
outputs and output pulse (Trace D). RC net-
works differential delay manifests as IC 2 -IC 3
positive overlap. G 1 extracts this interval and
presents circuit output.
termination. IC 1 ’s output drives fixed
and variable RC networks. Programming
resistor R G primarily determines the net-
works’ charge-time difference and, hence,
delay at a scale factor of approx 80
1V/DIV
/nsec.
INPUT
1/4 LT1721
2nSEC/DIV
_
510
R
0.8
/nSEC
1/4 LT1721
The 5-nsec-wide output with
R
IC 1
+
Figure 3
COMPARATOR
is clean with well-
defined transitions. Post-transition aberrations
are within 8% and derive from G 1 bond-wire
inductance and an imperfect coaxial probe path.
390
50
+
VARIABLE
DELAY
8 pF
IC 2
G 1
74AHCO8
AND
GATE
_
TO 2.5V
0.1
F
2.5V
DIFFERENTIAL
DELAY
GENERATOR
1k
1k
OUTPUT
5V
+
1/4 LT1721
620
IC 3
1V/DIV
_
FIXED
DELAY
8 pF
Figure 1
200pSEC/DIV
This pulse generator has 0- to 10-nsec width and 520-psec transitions. IC 1 unloads termina-
tion and drives the differential delay network. The IC 2 -IC 3 complementary outputs represent
delay difference as edge timing skew. G 1 , which is high during IC 2 -IC 3 ’s positive overlap,
presents circuit output.
The narrowest amplitude
pulse width is 1 nsec, and
the base width measures 1.7 nsec.
Measurement bandwidth is 3.9 GHz.
108 EDN | NOVEMBER 11, 2004
www.edn.com
tor could be as low as 150
I f you need to produce extremely fast
390
Figure 4
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design
ideas
coaxial probing path. Figure 3 shows the
narrowest full amplitude, 5V pulse avail-
able. Width measures 1 nsec at the 50%
amplitude point and 1.7 nsec at the base
in a 3.9-GHz bandwidth. Shorter widths
are available if partial amplitude pulses
are acceptable. Figure 4 shows a 3.3V,
700-psec width (50%) with a 1.25-nsec
base. G 1 ’s rise time limits minimum
achievable pulse width. The partial-am-
plitude pulse, 3.3V high, measures 700
psec with a 1.25-nsec base ( Figure 5 ). Fig-
ure 6 , taken in a 3.9-GHz sampled band-
pass, measures 520-psec rise time. Fall
time is similar. The transition of the probe
edge is well-defined and free of artifacts.
1V/DIV
1V/DIV
500 pSEC/DIV
200 pSEC/DIV
The partial-amplitude
pulse, 3.3V high, meas-
ures 700 psec wide with a 1.25-nsec base. The
trace granularity is an artifact of the 3.9-GHz-
sampling-oscilloscope operation.
Figure 5
A transition detail in
the 3.9-GHz bandpass
with rise time of 90 psec shows 520-psec rise
time; fall time is similar. The granularity
derives from sampling-oscilloscope operation.
Figure 6
Accurately measure resistance
with less-than-perfect components
Dave Van Ess, Cypress Semiconductor
strain gauges or thermistors,
you must accurately and in-
expensively measure resistance us-
ing circuitry built with imperfect
components and in which
gain and offset errors can
significantly limit the accuracy of
ohmic measurements. The right
circuit topology makes it possible
to eliminate most error terms while
measuring ohms, leaving the accuracy to
be determined by just a single reference
resistor.
Unlike measuring voltage or current,
measuring a passive attribute, such as re-
V REF
V RESPONSE
BUFFER
ADC
current, you need do no math, so
this method was popular when the
cost of computation was more than
the cost of building an accurate
current source. However, the accu-
racy of the current source directly
limits the accuracy of the reading
and any gain or offset errors from
measuring the response voltage off-
sets the accuracy, as well. Addition-
ally, the range of measurement is limited
to the ADC’s signal range, as the follow-
ing equation shows:
R REF
R T
Figure 1
The resistive-divider topology provides a lower cost alterna-
tive to a current source and a precision resistor for calibration.
sistance, requires a stimulus. One method
of measuring resistance is to force a
known current through a resistor and
measure the voltage across the resistor.
Measuring ohms in this way means that,
with the correct selection of stimulus
V 0
V REF+
V 0
V REF+
. . . .
R REF3
R REF2
R REF1
R REF
V 1
BUFFER
G=0.94
12-BIT ADC
R T
. . . .
R T3
R T2
R T1
V 2
V REF
V REF
V 2
Figure 2
Figure 3
Remove most gain and offset errors using two measurements
and a ratio calculation.
Extend the idea to handle multiple sensors and signal paths, using
multiplexing through a single buffer and A/D converter.
110 EDN | NOVEMBER 11, 2004
www.edn.com
F OR TRANSDUCERS, such as
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