EMIF02-SPK01F1.pdf

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EMIF02-SPK01F1
IPAD™
2 LINES EMI FILTER
AND ESD PROTECTION
MAIN PRODUCT CHARACTERISTICS:
Where EMI filtering in ESD sensitive equipment is
required :
■ Mobile phones and communication systems
■ Computers, printers and MCU Boards
DESCRIPTION
The EMIF02-SPK01 is a highly integrated device
designed to suppress EMI/RFI noise in all systems
subjected to electromagnetic interferences. The
EMIF02 flip chip packaging means the package
size is equal to the die size.
This filter includes an ESD protection circuitry
which prevents the device from destruction when
subjected to ESD surges up 15kV.
BENEFITS
■
Flip-Chip
(5 Bumps)
Table 1: Order Code
Part Number
Marking
EMI symmetrical (I/O) low-pass filter
EMIF02-SPK01F1
FX
■
High efficiency in EMI filtering
Figure 1: Pin Configuration (ball side)
■
Very low PCB space consuming: 1.07mm x 1.47mm
■
Very thin package: 0.65 mm
■
High efficiency in ESD suppression
■
High reliability offered by monolithic integration
32
1
High reducing of parasitic elements through inte-
gration & wafer level packaging
■
I2
I1
A
COMPLIES WITH THE FOLLOWING STANDARDS:
IEC 61000-4-2
Level 4 on input pins 15kV (air discharge)
8kV (contact discharge)
Level 1 on output pins 2kV (air discharge)
2kV (contact discharge)
MIL STD 883E -Method 3015-6 Class 3
GND
B
O2
O1
C
Figure 2: Basic Cell Configuration
Low-pass Filter
Input
Output
Ri/o = 10
Cline = 200pF
Ω
GND
GND
GND
TM: IPAD is a trademark of STMicroelectronics.
October 2004
REV. 3
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EMIF02-SPK01F1
Table 2: Absolute Ratings (limiting values)
Symbol
Parameter and test conditions
Value
Unit
T j
Maximum junction temperature
125
°C
T op
Operating temperature range
- 40 to + 85
°C
T stg
Storage temperature range
- 55 to 50
°C
Table 3: Electrical Characteristics (T amb = 25 °C)
Symbol Parameter
V BR Breakdown voltage
I RM Leakage current @ V RM
V RM Stand-off voltage
V CL Clamping voltage
R d Dynamic impedance
I PP Peak pulse current
R I/O Series resistance between Input & Output
C line Input capacitance per line
I
I PP
V CL
V BR
V RM
I R
I RM
V
I RM
I R
V RM
V BR
V CL
I PP
Symbol
Test conditions
Min.
Typ.
Max.
Unit
V BR
I R = 1 mA
6
8
V
I RM
V RM = 3V per line
500
nA
R I/O
Tolerance ± 20%
10
Ω
C line
V R = 0V
200
pF
Figure 3: S21 (dB) attenuation measurements
and Aplac simulation
Figure 4: Analog crosstalk measurements
0.00
dB
0.00
dB
-5.00
-10.00
-10.00
-15.00
-20.00
-20.00
-30.00
-25.00
-40.00
-30.00
-50.00
-35.00
-40.00
-60.00
100.0k
1.0M
10.0M
100.0M
1.0G
100.0k
1.0M
10.0M
100.0M
1.0G
f/Hz
f/Hz
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-
-
-
-
-
-
-
-
-
-
-
-
1.0M
356213059.016.png
EMIF02-SPK01F1
Figure 5: ESD response to IEC61000-4-2 (+ 15kV
air discharge) on one input V(in) and one output
V(out)
Figure 6: ESD response to IEC61000-4-2 (15kV
air discharge) on one input V(in) and one output
V(out)
Figure 7: Line capacitance versus applied
voltage
C(pF)
250
200
F=1MHz
V osc =30mV RMS
T j =25°C
150
100
50
V(V)
R
0
0
1
2
3
4
5
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EMIF02-SPK01F1
Figure 8: Aplac model
IN1
Rbump Lbump
Rspk
Lspk
Lbump Rbump
GND
OUT1
Lsub
model = D1
model = D2
Rsub
GND
Rbump
model = D3
Lbump
model = D1
model = D2
Lgnd
Cgnd
IN2
OUT2
Rgnd
Rbump Lbump
Rspk
Lspk
Lbump Rbump
EMIF02-SPK01F1 model
Ground return
Figure 9: Aplac parameters
Model D1
CJO=Cdiode1
BV=7
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.7
VJ=0.6
TT=50n
Model D3
CJO=Cdiode3
BV=7
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.12
VJ=0.6
TT=50n
Model D2
CJO=Cdiode2
BV=7
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.3
VJ=0.6
TT=50n
aplacvar Ls 1nH
aplacvar Rs 150m
aplacvar Rspk 10
aplacvar Lspk 10p
aplacvar Cdiode1 234pF
aplacvar Cdiode2 3.5ppF
aplacvar Cdiode3 1nF
aplacvar Lbump 50pH
aplacvar Rbump 10m
aplacvar Rsub 0.5m
aplacvar Lsub 10pH
aplacvar Rgnd 1m
aplacvar Lgnd 50pH
aplacvar Cgnd 0.15pF
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EMIF02-SPK01F1
Figure 10: Order code
EMIF yy - xxx zz Fx
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
Package
F = Flip-Chip
x = 1: 500µm, Bump = 315µm
= 2: Leadfree Pitch = 500µm, Bump = 315µm
Figure 11: FLIP-CHIP Package Mechanical Data
500µm ± 10
250µm ± 10
315µm ± 50
650µm ± 50
1.07mm ± 50µm
Figure 12: Foot print recommendations
Figure 13: Marking
Dot, ST logo
xx = marking
3 6 5
240
z = packaging
location
Copper pad Diameter :
250µm recommended , 300µm max
yww = datecode
(y = year
ww = week)
x
y
x
w
z
w
Solder stencil opening : 330µm
Solder mask opening recommendation :
340µm min for 315µm copper pad diameter
All dimensions in µm
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