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6N138, 6N139.fm
August 2008
Single-Channel: 6N138, 6N139
Dual-Channel: HCPL2730, HCPL2731
Low Input Current High Gain Split
Darlington Optocouplers
Features
Description
■
Low current – 0.5mA
The 6N138/9 and HCPL2730/HCPL2731 optocouplers
consist of an AlGaAs LED optically coupled to a high
gain split darlington photodetector.
The split darlington configuration separating the input
photodiode and the first stage gain from the output
transistor permits lower output saturation voltage and
higher speed operation than possible with conventional
darlington phototransistor optocoupler. In the dual
channel devices, HCPL2730/HCPL2731, an integrated
emitter-base resistor provides superior stability over
temperature.
The combination of a very low input current of 0.5mA
and a high current transfer ratio of 2000% makes this
family particularly useful for input interface to MOS,
CMOS, LSTTL and EIA RS232C, while output compati-
bility is ensured to CMOS as well as high fan-out TTL
requirements. An internal noise shield provides excep-
tional common mode rejection of 10 kV/µs.
■
Superior CTR-2000%
■
Superior CMR-10kV/µs
■
CTR guaranteed 0–70°C
■
U.L. recognized (File # E90700)
■
VDE recognized (File # 120915) Ordering option V,
e.g., 6N138V
■
Dual Channel – HCPL2730, HCPL2731
Applications
■
Digital logic ground isolation
■
Telephone ring detector
■
EIA-RS-232C line receiver
■
High common mode noise line receiver
■
µP bus isolation
■
Current loop receiver
Schematic
Package Outlines
N/C
1
8
V CC
+
1
8
V CC
8
V F1
1
+
2
7
V B
_
2
7
V 01
V F
_
3
6
V O
_
3
6
V 02
8
8
V F2
1
1
N/C
4
5
GND
+
4
5
GND
6N138 / 6N139
HCPL2730 / HCPL2731
©2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
647865984.012.png 647865984.013.png 647865984.014.png 647865984.015.png 647865984.001.png 647865984.002.png 647865984.003.png 647865984.004.png 647865984.005.png 647865984.006.png 647865984.007.png
= 25°C unless otherwise specified)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
(T
A
Symbol
Parameter
Value
Units
T
STG
Storage Temperature
-55 to +125
°C
T
OPR
Operating Temperature
-40 to +85
°C
T
SOL
Lead Solder Temperature (Wave solder only. See recommended reflow profile
graph for SMD mounting)
260 for 10 sec
°C
EMITTER
I
F
(avg) DC/Average Forward Input Current
Each Channel
20
mA
I
F
(pk) Peak Forward Input Current (50% duty cycle, 1 ms P.W.) Each Channel
40
mA
I
F
(trans) Peak Transient Input Current - (
≤
1µs P.W., 300 pps)
1.0
A
V
R
Reverse Input Voltage
Each Channel
5
V
P
D
Input Power Dissipation
Each Channel
35
mW
DETECTOR
I
O
(avg) Average Output Current
Each Channel
60
mA
V
ER
Emitter-Base Reverse Voltage
6N138 and 6N139
0.5
V
V
CC
, V
O
Supply Voltage, Output Voltage
6N138, HCPL2730
-0.5 to 7
V
6N139, HCPL2731
-0.5 to 18
P
O
Output Power Dissipation
Each Channel
100
mW
©2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
2
Absolute Maximum Ratings
647865984.008.png
Electrical Characteristics
(T
A
= 0 to 70°C unless otherwise specified)
Individual Component Characteristics
Symbol
Parameter
Test Conditions
Device Min. Typ.* Max. Unit
EMITTER
V
F
Input Forward Voltage
T
A
= 25°C
All
1.30
1.7
V
Each channel (I
F
= 1.6mA)
1.75
BV
R
Input Reverse
Breakdown Voltage
T
A
= 25°C, I
R
= 10µA
All
5.0
20
V
∆
V
F
/
∆
T
Temperature
Coefficient of
Forward Voltage
I
F
= 1.6mA
All
-1.8
mV/°C
DETECTOR
I
OH
Logic HIGH Output
Current
I
F
= 0mA, V
O
= V
CC
= 18V
6N139
0.01
100
µA
Each Channel
HCPL2731
I
F
= 0mA, V
O
= V
CC
= 7V
6N138
0.01
250
Each Channel
HCPL2730
I
CCL
Logic LOW supply
I
F
= 1.6mA, V
O
= Open, V
CC
= 18V
6N138,
6N139
0.4
1.5
mA
I
F1
= I
F2
= 1.6mA, V
CC
= 18V
HCPL2731
1.3
3
V
O1
– V
O2
= Open, V
CC
= 7V
HCPL2730
I
CCH
Logic HIGH Supply
I
F
= 0mA, V
O
= Open, V
CC
= 18V
6N138,
6N139
0.05
10
µA
I
F1
= I
F2
= 0mA, V
CC
= 18V
HCPL2731
0.10
20
V
O1
– V
O2
= Open, V
CC
= 7V
HCPL2730
Transfer Characteristics
Symbol
Parameter
Test Conditions
Device
Min. Typ.* Max. Unit
COUPLED
CTR
Current Transfer
Ratio
I
F
= 0.5mA, V
O
= 0.4 V, V
CC
= 4.5V
6N139
400 1100
%
(1)(2)
Each Channel
HCPL2731
3500
I
F
= 1.6mA, V
O
= 0.4 V, V
CC
= 4.5V
6N139
500 1300
Each Channel
HCPL2731
2500
I
F
= 1.6mA, V
O
= 0.4 V, V
CC
= 4.5V
6N138
300 1300
Each Channel
HCPL2730
2500
V
OL
Logic LOW Output
Voltage
I
F
= 0.5mA, I
O
= 2mA, V
CC
= 4.5V
6N139
0.08
0.4
V
(2)
I
= 1.6mA, I
= 8mA, V
= 4.5V
6N139
0.01
0.4
F
O
CC
Each Channel
HCPL2731
I
F
= 0.5mA, I
O
= 15mA, V
CC
= 4.5V
6N139
0.13
0.4
Each Channel
HCPL2731
I
F
= 12mA, I
O
= 24mA, V
CC
= 4.5V
6N139
0.20
0.4
Each Channel
HCPL2731
I
F
= 1.6mA, I
O
= 4.8mA, V
CC
= 4.5V
6N138
0.10
0.4
Each Channel
HCPL2730
*All Typicals at T
A
= 25°C
©2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
3
A
647865984.009.png
Electrical Characteristics
(Continued) (T
A
= 0 to 70°C unless otherwise specified)
Switching Characteristics
(V
CC
= 5V)
Symbol Parameter
Test Conditions
Device
Min. Typ.* Max. Unit
T
PHL
Propagation Delay
Time to Logic
LOW
R
L
= 4.7
Ω
, I
F
= 0.5mA
6N139
30
µs
(2)
(Fig. 24)
T
= 25°C
4
25
R
= 4.7
Ω
, I
= 0.5mA
HCPL2731
120
L
F
Each Channel
T
= 25°C
3
100
R
L
= 270
Ω
, I F = 12mA
6N139
2
T A = 25°C
0.2
1
R L = 270
Ω
, I F = 12mA, Each Channel
HCPL2730
3
T A = 25°C
HCPL2731
0.3
2
R L = 2.2
Ω
, I F = 1.6mA
6N138
15
T A = 25°C
1.5
10
R L = 2.2
Ω
, I F = 1.6mA, Each Channel
HCPL2731
HCPL2730
25
T A = 25°C
1
20
T PLH
Propagation Delay
Time to Logic
HIGH (2) (Fig. 24)
R L = 4.7
Ω
, I F = 0.5mA
6N139
90
µs
Each Channel HCPL2731
R L = 4.7
Ω
, I F = 0.5mA, T A = 25°C
6N139
12
60
Each Channel HCPL2731
22
R L = 270
Ω
, I F = 12mA
6N139
10
T A = 25°C
1.3
7
R L = 270
Ω
, I F = 12mA, Each Channel
HCPL2730
HCPL2731
15
T A = 25°C
5
10
R L = 2.2
Ω
, I F = 1.6mA
6N138
50
Each Channel HCPL2730/1
R L = 2.2
Ω
, I F = 1.6mA, T A = 25°C
6N138
7
35
Each Channel HCPL2730/1
16
|CM H |
Common Mode
Tr ansient
Immunity at Logic
HIGH (3) (Fig. 25)
I F = 0mA, |V CM | = 10V P-P , T A = 25°C,
R L = 2.2
6N138
6N139
1,000 10,000
V/µs
Ω
Each Channel HCPL2730
HCPL2731
|CM L |
Common Mode
Tr ansient
Immunity at Logic
LOW (3) (Fig. 25)
(I F = 1.6mA, |V CM | = 10V P-P , R L = 2.2
Ω
)
6N138
6N139
1,000 10,000
V/µs
T A = 25°C
Each Channel HCPL2730
HCPL2731
** All Typicals at T
A
= 25°C
©2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
4
A
A
647865984.010.png
Electrical Characteristics (Continued) (T A = 0 to 70°C unless otherwise specified)
Isolation Characteristics
Symbol
Characteristics
Test Conditions
Min. Typ.* Max.
Unit
I I-O
Input-Output Insulation Leakage
Current (4)
Relative humidity = 45%,T A = 25°C,
t = 5s, V I-O = 3000VDC
1.0
µA
V ISO
Withstand Insulation Test
Voltage (4)
RH
≤
50%, T A = 25°C, I I-O
≤
2µA,
2500
V RMS
t = 1 min.
R I-O
Resistance (Input to Output) (4)
V I-O = 500VDC
10 12
Ω
C I-O
Capacitance (Input to Output) (4)(5)
f = 1MHz
0.6
pF
I I-I
Input-Input Insulation Leakage
Current (6)
45%, V I-I = 500VDC, t = 5s,
HCPL2730/2731 only
≤
0.005
µA
R I-I
Input-Input Resistance (6)
V I-I = 500VDC, HCPL2730/2731 only
10 11
Ω
C I-I
Input-Input Capacitance (6)
f = 1MHz, HCPL2730/2731 only
0.03
pF
*All Typicals at T A = 25°C
Notes:
1. Current Transfer Ratio is defined as a ratio of output collector current, I O , to the forward LED input current,
I F , times 100%.
2. Pin 7 open. (6N138 and 6N139 only)
3. Common mode transient immunity in logic HIGH level is the maximum tolerable (positive) dV cm /dt on the
leading edge of the common mode pulse signal V CM , to assure that the output will remain in a logic HIGH state
(i.e., V O > 2.0V). Common mode transient immunity in logic LOW level is the maximum tolerable (negative)
dV cm /dt on the trailing edge of the
common mode pulse signal, V CM , to assure that the output will remain in a logic LOW state (i.e., V O < 0.8V).
4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are
shorted together.
5. For dual channel devices, C I-O is measured by shorting pins 1 and 2 or pins 3 and 4 together and pins 5 through 8
shorted together.
6. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
I
©2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
5
RH
647865984.011.png

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