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76C256C.PDF
LG Semicon Co.,Ltd.
GM76C256CL/LL
32,768 WORDS x 8 BIT
CMOS STATIC RAM
Description
Pin Configuration
The GM76C256C family is a 262,144 bits static
random access memory organized as 32,768 words
by 8 bits. Using a 0.6 u m advanced CMOS tech-
nology and operated a single 5.0V supply. .
Advanced circuit techniques provide both high
speed and low power consumption. The Family
can support various operating temerature ranges
for user flexibility of system design. .
The Family has Chip select /CS, which allows for
device selection and data retention control, and
output enable (/OE), which provides fast memory
access. Thus it is suitable for high speed and low
power applications, particularly where battery
back-up is required. .
A14
A12
1
2
3
4
5
28
V CC
/WE
A13
A8
A9
A11
/OE
A10
/CS
I/O7
I/O6
I/O5
27
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
26
25
24
6
7
8
23
22
21
9
10
11
20
19
18
I/O1
12
17
I/O2
V SS
13
16
I/O4
I/O3
Features
* High Speed : Fast Access and Cycle Time
55/70ns Max
* Low Power Standby and Low Power Operation
-Standby : 165uW at T A = -25 ~ 85 C (LLE)
110uW at T A = 0 ~ 70 C (LL)
-Operation : 385mW at Vcc=5.0V + 0.5V
* Completely Static RAM : No Clock or Timing
strobe required
* Power Supply Voltage : 5.0V + 0.5V
* Low Data Retention Voltage : 2.0V(Min)
* Temperature Range
-GM76C256CL/LL : ( 0 ~ 70 C )
-GM76C256CLE/LLE : (-25 ~ 85 C )
* Package Type : JEDEC Standard
28-DIP,SOP,TSOP(I)
14
15
(Top View)
Block Diagram
A0
A1
A2
9
X
Decoder
512
MEMORY CELL ARRAY
512 x 64 x 8
(32K x 8)
Address
Buffer
64 x 8
A13
A14
6
64
Y
Decoder
Column Select
Pin Description
Pin
Function
Chip
Control
8
/CS
A0-A14
Address Inputs
/WE
Write Enable Input
Output Enable Input
Chip Select Input
Data Input/Output
Power Supply
Ground
/OE
/CS
/OE
I/O
Control
I/O Buffer
/WE
I/O0-I/O7
V CC
V SS
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214208068.025.png 214208068.026.png 214208068.027.png 214208068.028.png 214208068.001.png 214208068.002.png
LG Semicon
GM76C256CL/LL
Absolute Maximum Ratings
*1
Symbol
Parameter
Rating
Unit
T A
Ambient
Temperature
under Bias
GM76C256CL/LL
0 ~ 70
C
GM76C256CLE/LLE
-25 ~ 85
C
T STG
Storage Temperature
-65 ~ 150
C
V SOL
Soldering Temperature and Time
260, 10 (at lead)
C,S
V CC
Supply Voltage
-0.3 ~ 4.6
V
V IN
Input Voltage
-0.3 ~ 4.6
*2
V
V I/O
Input and Output Voltage
-0.5 ~ V CC + 0.5
V
P D
Power Dissipation
1.0
W
Notes:
1. Operation at above Absolute Maximum Ratings can adversely affect device reliability.
2. -3.0V at pulse width 50ns Max.
Recommended DC Operating Conditions (T A = -25 ~ 85 C )
GM76C256C
Symbol
Parameter
Unit
Min
Typ
Max
V CC
Supply Voltage
4.5
5.0
5.5
V
V IH
Input High Voltage
2.2
-
V CC + 0.3
V
V IL
Input Low Voltage
-0.3*
-
0.8
V
*Note: V IL =-3.0V Min for pulse width less than 50ns.
Truth Table
/CS
/WE
/OE
Input/Output
MODE
H
X
X
Hi-Z
Not Selected
L
H
L
Output Data
Read
L
L
X
Input Data
Write
L
H
H
Hi-Z
Output Disable
*Note: X means "don't care".
34
214208068.003.png 214208068.004.png 214208068.005.png 214208068.006.png
LG Semicon
GM76C256CL/LL
DC Electrical Characteristics (V CC =5.0V + 0.5V , T A = -25 ~ 85 C )
GM76C256C
Symbol
Parameter
Test Conditions
Unit
Min
Typ
Max
I I(L)
Input Leakage Current
V IN = 0 to V CC
-1
-
1
uA
I O(L)
Output Leakage Current
/CS = V IH or /OE = V IH or
/WE = V IL , V< V OUT < V CC
-1
-
1
uA
V OH
High Level Output Voltage
I OH = -1.0mA
2.4
-
-
V
V OL
Low Level Output Voltage
I OL = 2.1mA
-
-
0.4
V
I CC
Operating Supply Current
/CS = V IL ,
V IN = V IH /V IL, I I/O = 0mA
-
-
10
mA
I CC1
Average Operating Current
/CS = V IL ,
V IN = V IH /V IL
I I/O = 0mA
t cycle = Min, cycle
-
-
70
mA
I CC2
Average Operating Current
/CS = V IL ,
V IN = V IH /V IL
I I/O = 0mA
t cycle = 1us, cycle
-
-
10
mA
I CCS1
Standby Current (TTL)
/CS = V IH
-
-
1.0
mA
I CCS2
Standby Current (CMOS)
0 to +70C (LL)
-
-
20 uA
/CS < V CC -0.2V(LL)
-25 to +85C (LLE)
-
-
30
uA
/CS < V CC -0.2V (L)
0 to +70C (L)
-
-
40
uA
-25 to +85C (LE)
-
-
60 uA
*TYP. Values are measured at 25 C , V CC = 5.0V
35
214208068.007.png
LG Semicon
GM76C256CL/LL
AC Operating Characteristics (V CC =5.0V + 0.5V , T A = -25 ~ 85 C )
Read Cycle
Symbol
Parameter
Condi-
tions
GM76C256C-55
GM76C256C-70
Unit
Min
Max
Min
Max
t RC
Read Cycle Time
55
-
70
-
ns
t AA
Address Access Time
-
55
-
70
ns
t ACS
Chip Select Access Time
*1
-
55
-
70
ns
t OE
Output Enable Access Time
-
25
-
30
ns
t OH
Output Hold Time
10
-
10
-
ns
t CLZ
Chip Selection to Output in Low-Z
10
-
10
-
ns
t OLZ
Output Disable to Output in Low-Z
*2
5
-
5
-
ns
t CHZ
Chip Deselection to Output in High-Z
0
20
0
25
ns
t OHZ
Output Disable to Output in High-Z
0
20
0
25
ns
Write Cycle
Symbol
Parameter
Condi-
tions
GM76C256C-55
GM76C256C-70
Unit
Min
Max
Min
Max
t WC
Write Cycle Time
55
-
70
-
ns
t CW
Chip Select to End of Write
45
-
60
-
ns
t AW
Address Set-up Time to End of Write
45
-
60
-
ns
t AS
Address Set-up Time
0
-
0
-
ns
t WP
Write Pulse Width
*1
40
-
50
-
ns
t WR
Write Recovery Time
0
-
0
-
ns
t DW
Data to Write Time Overlap
25
-
30
-
ns
t DH
Data Hold Time
0
-
0
-
ns
t WHZ
Write to Output in High-Z
0
20
0
25
ns
*2
t OW
Output Active from End of Write
5
-
5
-
ns
*1 Test Conditions.
1. Input pulse level : 0.6V to 2.4V
2. tr = tf = 5ns
3. Input/output timing reference level : 1.5V
4. Output load C L = 100pF + 1TTL Load
*2 Test Conditions.
1. Input pulse level : 0.6V to 2.4V
2. tr = tf = 5ns
3. Input timing reference level : 1.5V
4. Output timing reference level :
+/-200mV (the level displacement from
stable output voltage level)
5. Output load C L = 5pF + 1TTL Load
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214208068.008.png
LG Semicon
GM76C256CL/LL
Timing Waveforms
Read Cycle 1 (Note 1, 2)
t RC
ADD
t AA
t OH
D OUT
PREVIOUS VALID DATA
VALID DATA
Read Cycle 2 (Note 2)
t RC
ADD
/CS
t ACS
/OE
t OLZ
t CLZ
t OE
t OHZ
t CHZ
High-Z
D OUT
VALID DATA
High-Z
Notes:
1. Device is continuously selected. /OE, /CS < V IL.
2. /WE is high for read cycle.
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